MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 228

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MT9072

Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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MT9072
228
Notes:
Framer 1-8, 1 of MT9072
LIU 1-8, 8 of Generic LIU
PLL, 1 of MT9042
IMA
- Framer elastic buffer is bypassed at DSTo.
- LIU Transmit JA and PLL are enabled.
- Transmit and receive paths may be asynchronous with each
other.
LINE 1
LINES 2 to 7
LINE 8
Transmit
Transmit
Receive
Receive
xfmr
xfmr
xfmr
xfmr
Figure 13 - 8 E1 Links with ATM IMA with Asynchronous ST-BUS Mode
RT
RR
TT
TR
RT
RR
TT
TR
LIU’s 2 to 7
LIU 1/8
LIU 8/8
RNEG
RNEG
RPOS
TNEG
RPOS
TNEG
TPOS
TPOS
RCLK
RCLK
TCLK
TCLK
RPOS
RNEG
EXCLi
TPOS
TNEG
TXCL
PRI
SEC
RPOS
RNEG
EXCLi
TPOS
TNEG
TXCL
Framers 2 to 7
Framer 8/8
Framer 1/8
PLL
RxDLC
RxDLC
RxDLC
DSTo
DSTo
RxBF
RxBF
DSTo
RxBF
DSTi
DSTi
DSTi
C2o
C4o
F0o
CKi
CKi
FPi
FPi
CKi
FPi
6
6
6
6
6
6
DSTi0
RxCK0
RxSYNC0
DSTo0
TxCK0
TxSYNC0
DSTi 1-6
RxCK1-6
RxSYNC1-6
DSTo1-6
TxCK1-6
TxSYNC1-6
DSTi7
RxCK7
RxSYNC7
DSTo7
TxCK7
TxSYNC7
PLLREF0
PLLREF1
REFCK0
ATM BUS
IMA
Preliminary Information
F0 = FPi = TxSYNCo
F0 = RxBF = RxSYNCo
C1.5 = RxDLC = RxCKo
c1.5i= CKi = TxCKo
C1.5i
Bits
F0
GCI Timing

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