MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 4

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

MT9072
Conmon Channel Signaling Timeslot Assigner
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Access and Monitoring for National (Sa) Bits (E1 mode only)
In addition to the datalink functions, the Sa bits can be accessed using:
Slip Buffers
Interface to the Physical Layer Device
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Transmit Slip Buffer
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Receive Slip Buffer
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Selected 64 Kbit/s CCS channels (for V5.2 and GR-303) can be routed to/from an external multichannel
HDLC, using the CSTi/0 pins
Single rail NRZ
Dual rail (AMI) RZ or NRZ
Transmits/samples data on the rising or falling edge of the line clock
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Two-frame slip buffer capable of performing a
controlled slip. Intended for rate conversion
in the transmit direction
Programmable delay
Transmit slips are independent of receive
slips
Indication of slip
Indication of slip direction
Two-frame slip buffer capable of performing a
controlled slip
Wander tolerance of 142 UI (92 s) peak
Indication of slip
Indication of slip direction
Optional B8ZS line coding
Pulse density enforcement
Forced ones stuffing (bit 7 of a DS0)
GTE zero suppression code
Bell zero suppression code
DDS zero suppression code
Single byte register
Five byte transmit and receive national bit buffers
A maskable interrupt is generated on the change of state of any Sa bit
T1/J1 Mode
T1/J1 Mode
Receive Slip Buffer
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Two-frame slip buffer capable of performing a
controlled slip
Wander tolerance of 208 UI peak-to-peak
Indication of slip
Indication of slip direction
Optional HDB3 line coding
E1 Mode
E1 Mode
Advance Information