MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 197

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
Table 183 - Sync, CRC-4 Remote, Alarms, MAS and Phase Interrupt Status Register (Address Y34)
Bit
15
14
13
12
10
11
9
8
7
6
5
4
RCRCRI
RCRC0I
RCRC1I
AUXPI
AIS16I
LOSSI
CEFSI
RSLPI
Name
RAII
AISI
YI
#
not used.
Remote CRC-4 and RAI Interrupt. This bit is one when the corresponding latched status bit
(RCRCRL, register address Y24) is set, and the corresponding mask bit is unmasked
(RCRCRM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
Receive Slip Interrupt. This bit is one when the corresponding latched status bit (RSLPL,
register address Y24) is set, and the corresponding mask bit is unmasked (RSLPM, register
address Y44). This bit is cleared when either this register, or the latched status register is
read.
Receive Y-bit Interrupt. This bit is one when the corresponding latched status bit (YL,
register address Y24) is set, and the corresponding mask bit is unmasked (YM, register
address Y44). This bit is cleared when either this register, or the latched status register is
read.
Auxiliary Pattern Interrupt. This bit is one when the corresponding latched status bit
(AUXPL, register address Y24) is set, and the corresponding mask bit is unmasked (AUXPM,
register address Y44). This bit is cleared when either this register, or the latched status
register is read.
Remote Alarm Indication Status Interrupt. This bit is one when the corresponding latched
status bit (RAIL, register address Y24) is set, and the corresponding mask bit is unmasked
(RAIM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
Alarm Indication Status Signal Interrupt. This bit is one when the corresponding latched
status bit (AISL, register address Y24) is set, and the corresponding mask bit is unmasked
(AISM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
Alarm Indication Signal 16 Status Interrupt. This bit is one when the corresponding latched
status bit (AIS16L, register address Y24) is set, and the corresponding mask bit is unmasked
(AIS16M, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
Loss of Signal Status Indication Interrupt. This bit is one when the corresponding latched
status bit (LOSSL, register address Y24) is set, and the corresponding mask bit is unmasked
(LOSSM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
Remote CRC-4 and RAI T10 Interrupt.This bit is one when the corresponding latched status
bit (RCRC0L, register address Y24) is set, and the corresponding mask bit is unmasked
(RCRC0M, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
Remote CRC-4 and RAI T450 Interrupt. This bit is one when the corresponding latched
status bit (RCRC1L, register address Y24) is set, and the corresponding mask bit is
unmasked (RCRC1M, register address Y44). This bit is cleared when either this register, or
the latched status register is read.
Consecutively Errored Frame Alignment Signal Interrupt. This bit is one when the
corresponding latched status bit (CEFSL, register address Y24) is set, and the corresponding
mask bit is unmasked (CEFSM, register address Y44). This bit is cleared when either this
register, or the latched status register is read.
Functional Description
(E1)
MT9072
197