MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 204
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MT9072
Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9072.pdf
(278 pages)
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Bit
Table 188 - Counter (Counter Indication and Counter Overflow) Interrupt Mask Register (Address
9
8
7
6
5
4
3
2
1
0
CEOM
VEOM
EEOM
PCOM
PEOM
Name
CEIM
VEIM
EEIM
PEIM
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
CRC-4 Error Counter Overflow Mask. This is the mask bit for the CEOI interrupt status bit in
the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
CRC-4 Error Counter Indication Mask. This is the mask bit for the CEII interrupt status bit in
the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
Bipolar Violation (BPV) Error Counter Overflow Mask. This is the mask bit for the VEOI
interrupt status bit in the Counter (Counter Indication and Counter Overflow) Interrupt Status
Register (address Y35). If this mask bit is one, the corresponding interrupt bit will remain
inactive. If this mask bit is zero, the corresponding interrupt bit will function normally.
Bipolar Violation (BPV) Error Counter Indication Mask. This is the mask bit for the VEII
interrupt status bit in the Counter (Counter Indication and Counter Overflow) Interrupt Status
Register (address Y35). If this mask bit is one, the corresponding interrupt bit will remain
inactive. If this mask bit is zero, the corresponding interrupt bit will function normally.
E-Bit Error Counter Overflow Mask. This is the mask bit for the EEOI interrupt status bit in
the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
E-Bit Error Counter Indication Mask. This is the mask bit for the EEII interrupt status bit in
the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
PRBS CRC-4 Counter Overflow Mask. This is the mask bit for the PCOI interrupt status bit
in the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
not used.
PRBS Error Counter Overflow Mask. This is the mask bit for the PEOI interrupt status bit in
the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
PRBS Error Counter Indication Mask. This is the mask bit for the PEII interrupt status bit in
the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
Y45) (E1)
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