MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 88

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

MT9072
13.1.6
The alarms shown in Table 46 are detected by the receiver. The status register bits provide real time status of the
alarm, while the interrupt status registers bits provide latched status indications which are cleared when read. Each
interrupt status register may also generate a maskable interrupt. The possible transmitted alarms are also shown
in the table. See the register bit descriptions for details.
88
D4 Yellow Alarm. This bit is set if bit position 2 of virtually every
DS0 channel is a zero for a period of 600 milliseconds. The alarm is
tolerant of errors by permitting up to 16 ones in a 48 millisecond
integration period. The alarm clears in 200 milliseconds after being
removed from the line.
D4 Yellow Alarm - 48 millisecond sample. This bit is set if bit
position 2 of virtually every DS0 channel is a zero for a period of 48
milliseconds. The alarm is tolerant of errors by permitting up to 16
ones in the integration period. This bit is updated every 48
milliseconds.
Secondary D4 Yellow Alarm. This bit is set if 2 consecutive’1’s are
received in the S-bit position of the 12th frame of the D4
superframe.
AIS Alarm. This bit is set if fewer than 5 zeros are received in a 3
millisecond window.
ESFYEL.This bit is set if the ESF yellow alarm 0000000011111111
is receive in eight or more codewords out of ten in Bit Oriented
Message of FDL.
T1DM Received Yellow Alarm. If "Y" bit of the T1DM
Synchronization Word is received
Hex
1E
0B
0B
1E
1E
8B
8B
9E
T1 Alarms
Bit 1
0
0
0
0
1
1
1
1
Description
Bit 2
Table 45 - Mu Law Digital Milliwatt Pattern (T1)
0
0
0
0
0
0
0
0
Table 46 - Alarm Control and Status Bits (T1)
Control/Status Register
Bit 3
0
0
0
0
0
0
0
0
PCM 24 Payload Data
Bit 4
1
0
0
1
1
0
0
1
Bit 5
1
1
1
1
1
1
1
1
SECYEL
D4YALM
ESFYEL
T1DRY
D4Y48
AIS
Bit
Bit 6
1
0
0
1
1
0
0
1
Address
Y10
Y10
Y10
Y10
Y10
Y10
Advance Information
Bit 7
D4YALMI
SECYELI
ESFYELI
T1DMYI
D4Y48I
1
1
1
1
1
1
1
1
Interrupt Status
AISI
Bit
Register
Address
Bit 8
Y35
Y35
Y35
Y35
Y35
Y35
0
1
1
0
0
1
1
0