peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 293

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peb2256

Manufacturer Part Number
peb2256
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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NMF
LMFA
Data Sheet
No Multiframe Alignment Found
This bit is only valid if the CRC4 interworking is selected
(FMR2.RFS(1:0) = 11). Set if the multiframe pattern is not detected in
a time interval of 400 ms after the framer has reached the
doubleframe synchronous state. The receiver is then automatically
switched to doubleframe format.
This bit is reset if the basic framing has been lost.
Loss of Multiframe Alignment
Not used in doubleframe format (FMR2.RFS1 = 0). In this case LMFA
is set.
In CRC-multiframe mode (FMR2.RFS1 = 1), this bit is set
– if force resynchronization is initiated by setting bit FMR0.FRS, or
– if multiframe force resynchronization is initiated by setting bit
– if pulseframe alignment has been lost (FRS0.LFA).
It is reset if two CRC-multiframes have been received at an interval of
n × 2 ms (n = 1, 2, 3 and so forth) without a framing error.
If bit FRS0.LMFA is cleared a loss of multiframe alignment recovery
interrupt status ISR2.MFAR is generated.
FMR1.MFCS, or
293
FALC56 V1.2
E1 Registers
PEB 2256
2002-08-27

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