peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 309
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peb2256
Manufacturer Part Number
peb2256
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB2256.pdf
(490 pages)
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HA1, HA0
LA
Data Sheet
High Byte Address Compare - HDLC Channel 1
Significant only if 2-byte address mode or SS7 mode has been
selected.
In operating modes which provide high byte address recognition, the
FALC56 compares the high byte of a 2-byte address with the contents
of two individually programmable registers (RAH1, RAH2) and the
fixed values FE
Depending on the result of this comparison, the following bit
combinations are possible (SS7 support not active):
00 = RAH2 has been recognized
01 = Broadcast address has been recognized
10 = RAH1 has been recognized C/R = 0 (bit 1)
11 = RAH1 has been recognized C/R = 1 (bit 1)
Note: If RAH1, RAH2 contain identical values, a match is indicated
If Signaling System 7 support is activated (see MODE register), the
bit functions are defined as follows:
00 = Not valid
01 = Fill in signaling unit (FISU) detected
10 = Link status signaling unit (LSSU) detected
11 = Message signaling unit (MSU) detected
Low Byte Address Compare - HDLC Channel 1
Significant in HDLC modes only.
The low byte address of a 2-byte address field, or the single address
byte of a 1-byte address field is compared to two registers. (RAL1,
RAL2).
0 =
1 =
RAL2 has been recognized
RAL1 has been recognized
by "10" or "11".
H
and FC
309
H
(broadcast address).
FALC56 V1.2
E1 Registers
PEB 2256
2002-08-27
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