peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 300

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

CRC Error Counter 1 (Read)
CEC1L
CEC1H
CR(15:0)
Data Sheet
CR15
CR7
7
7
CRC Errors
No function if doubleframe format is selected.
In CRC-multiframe mode, the 16-bit counter is incremented when a
CRC-submultiframe has been received with a CRC error. CRC errors
are not counted during asynchronous state. The error counter does
not roll over.
During alarm simulation, the counter is incremented once per
submultiframe up to its saturation.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DCEC1
has to be set. With the rising edge of this bit updating the buffer is
stopped and the error counter is reset. Bit DEC.DCEC1 is reset
automatically with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter is latched and then automatically reset. The latched error
counter state should be read within the next second.
300
FALC56 V1.2
CR0
CR8
E1 Registers
0
0
PEB 2256
2002-08-27
(54)
(55)