peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 49

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Table 5
Pin
No.
19
20
74
80
14
15
16
17
18
Note: oD = open drain output
Data Sheet
PU = input or input/output comprising an internal pullup device
To override the internal pullup by an external pulldown, a resistor value of 22 k Ω
is recommended.
The pullup devices are activated during reset, this means their state is undefined
until the reset signal has been applied.
Unused pins containing pullups can be left open.
Ball
No.
A4
B2
E5
H1
H2
F1
G1
F2
G3
G2
Pin Definitions - Miscellaneous (cont’d)
Symbol
N.C.
TRS
TDI
TMS
TCK
TDO
Boundary Scan/Joint Test Access Group (JTAG)
Output (O)
Supply (S)
I + PU
I + PU
O
Input (I)
I + PU
I + PU
Unused Pins
Function
not connected, to be left open for compatibility
with future products.
Test Reset for Boundary Scan
(active low). If not connected, an internal pullup
transistor ensures high input level.
If the JTAG boundary scan is not used, this pin
must be connected to RES or V
Test Data Input for Boundary Scan
If not connected an internal pullup transistor
ensures high input level.
Test Mode Select for Boundary Scan
If not connected an internal pullup transistor
ensures high input level.
Test Clock for Boundary Scan
If not connected an internal pullup transistor
ensures high input level.
Test Data Output for Boundary Scan
49
Pin Descriptions
FALC56 V1.2
SS
.
PEB 2256
2002-08-27