cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 163

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cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
CX29503 Data Sheet
0x0D—Alarm 2 Interrupt Enable Register (IER6)
Unused and reserved bits should be written to 0.
LOOPDN
LOOPUP
OneSec
0x0E—Error Interrupt Enable Register (IER5)
Unused and reserved bits should be written to 0.
CERR
MERR
FERR
0x0F—Count Overflow Interrupt Enable Register (IER4)
Reserved bits should be written to 0.
FRED
COFA
SEF
BERR
FEBE
CRC
FERR
29503-DSH-002-B
RESERVED
LOOPDN
FRED
7
7
7
RESERVED
LOOPUP
Enable LOOPDN Interrupt.
Enable LOOPUP Interrupt.
Enable OneSec Interrupt. For the CX29503, it is not recommended to use this interrupt
because there would be too many interrupts. Use the One-Second interrupt in the Top Level
Interrupt Enable register.
Enable CERR Interrupt
Enable MERR Interrupt
Enable FERR Interrupt
Enable FRED Count Overflow Interrupt
Enable COFA Count Overflow Interrupt
Enable SEF Count Overflow Interrupt
Enable BERR Count Overflow Interrupt
Enable FEBE Count Overflow Interrupt
Enable CRC Count Overflow Interrupt
Enable FERR Count Overflow Interrupt
COFA
6
6
6
RESERVED
RESERVED
SEF
5
5
5
Mindspeed Technologies™
Preliminary Information
BERR
4
4
4
RESERVED
CERR
FEBE
3
3
3
RESERVED
RESERVED
RESERVED
2
2
2
RESERVED
MERR
CRC
1
1
1
Register Description
(SET TO 0)
OneSec
FERR
FERR
0
0
0
8
-
33

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