cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 92
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
- Current page: 92 of 388
- Download datasheet (5Mb)
Functional Description
Table 2-12. Mapping of Data To and From Overhead TSB Time Slots <tableContinuation>(2 of 2)
2.10.5.4
2-44
Source/Destination
Sonet: STS-3
SDH: STM-1
(VC-4 or AU-3 with
VC-3) Mapper
SDH: AU-4 with
VC-3 Mapper
SDH: AU-4 with
VC-3 Mapper
SDH: AU-4 with
VC-3 Mapper
SDH: AU-4 with
VC-3 Mapper
CSP
TS Bus
Sonet: Path Data Channel SDH:
Tandem Connection: LAPD
Data Link or Bit Oriented Link
N1 POH (4 LS bits)
Path User Channel: F2 POH
Byte
Path User Channel: F3 POH
Byte
APS (4 MS bits) and Spare Bits
(4 LS bits) K3 POH Byte
SDH: Tandem Connection:
LAPD Data Link or Bit Oriented
Link N1 POH (4 LS bits)
BAM Register Access
Overhead Data Communication Channel
Mapped to Logical Channels (LCs)
SONET Overhead Communication Channels
If four CX29503 devices are connected to the SI-Buses which are processing SONET
signals, at least one of the four devices will pass the following overhead data
communication channels across the Overhead TSB: DCCR, DCCM, F2, F3, and Z5
(N1).
If the SONET payload includes DS3 signals, then the DS3 TDL communications
channel will be carried on the overhead TSB. If that DS3 signal contains DS1 or E1
signals, then 28 DS1 FDL channels or 21 E1 Sa channels will also be carried on the
overhead TSB.
Description
Mindspeed Technologies™
Preliminary Information
Max Data
832 Kbps
32 Kbps
64 Kbps
64 Kbps
64 Kbps
32 Kbps
Rate
72–84
Time
Nos.
Slot
67
68
69
70
71
(Min 102 Kbps
per Time Slot)
Concatenated
Time Slots
72–84
None
None
None
None
None
Logical Channel (LC) No.
HDLC Controller
CX29503 Data Sheet
63
64
65
66
67
68
29503-DSH-002-B
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