cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 83
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
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CX29503 Data Sheet
2.10.3
Figure 2-16. TSB Interface Pins
29503-DSH-002-B
NOTE(S):
CX28560 requires pull-up resistors (10 kΩ) on TSB_TDAT and TSB_OTDAT.
TSB Signals
CX29503
TSB_ORSTUFF
TSB_OTSTUFF
TSB_TSYNCO
TSB_RSTUFF
TSB_TSTUFF
Figure 2-16
device. The Payload and Overhead buses each have separate Transmit and Receive
paths. The Receive path is defined from the CX29503 to an external device, and the
Transmit path is defined from an external device to the CX29503. The CX29503, as
the bus master, supplies the bus strobes, clocks, and stuff signals.
The requirement for stuffed data is explained in
See
TSB_TSTUFF and TSB_RSTUFF.
The three sync signals, TSB_TSYNCO, TSB_TSYNCI, and TSB_RSYNC, mark the
first DS0 byte of every DS1 frame. The DS0 byte for TSB_TDAT can either be
marked by the CX29503 using the sync output signal, TSB_TSYNCO, or marked by
the external device using the sync input signal, TSB_TSYNCI. Timing diagrams for
the sync signals, TSB_TSYNCO, TSB_TSYNCI, and TSB_RSYNC are given in
Chapter
TSB_TSYNCI
TSB_RSYNC
TSB_ORDAT
TSB_OTDAT
TSB_RDAT
TSB_OCLK
TSB_OSTB
TSB_TDAT
TSB_CLK
TSB_STB
Figures 2-18
1.0.
illustrates the TSB connections between the CX29503 and an external
Mindspeed Technologies™
Diagnostic
and
Preliminary Information
2-21
51.84/44.736 MHz
12.96/11.184 MHz
for the timing diagrams for the stuffing signals,
TSB_TCLK
TSB_TSTUFF
TGSYNC
TSB_TDAT
TSB_RCLK
TSB_RSTUFF
RGSYNC
TSB_RDAT
TSB_STB
TSB_TCLK
TSB_TSTUFF
TSB_TDAT
TSB_RCLK
TSB_RSTUFF
TSB_RDAT
TSB_STB
Section 2.10.4.2
CX28560
and
Section
Functional Description
2.10.5.2.
100702_024
2
-
35
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