cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 52
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
- Current page: 52 of 388
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Functional Description
2.3
2.4
2-4
Top-Level MUX
Global Control and Status Block
There is one Top-Level MUX block in the CX29503 device. Its function is to provide
a hardware interface between the internal Mapper/MUX blocks and external devices.
This block does not contain any software accessible registers. Its main functions are as
follows:
There are three Global Control and Status blocks for the CX29503, one for each
internal Mapper/MUX block. The main function is to provide top-level status and
control registers for each Mapper/MUX block, mainly the top-level interrupt status
and masking functionality. When an interrupt event from one of the sub-blocks is
reported, the registers in this block allow software to determine the source of the
interrupt. Also, interrupts from individual blocks can be masked at this level.
A microprocessor interface
A SI-Bus transmit and receive bus interface
A JTAG test port interface
Mindspeed Technologies™
Preliminary Information
CX29503 Data Sheet
29503-DSH-002-B
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