cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 63

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cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
CX29503 Data Sheet
Table 2-3. VT One “Shot Events” and Associated Registers
2.6.1.7
2.6.1.8
2.6.1.9
29503-DSH-002-B
BIP 2 error
REI-V error
VT new pointer with or without NDF
Change in J2 trace buffer contents
VT “One Shot” Event
The occurrence of VT “one shot” events are counted in registers and reported in the
Table 2-3
event.
VT Path Conditioning
This block automatically inserts AIS-V on the downstream VT when AIS-P, AIS-L,
LOP-P or LOF is detected (see
The received BIP2 errors received per frame, AIS-V , LOP-V, UNEQ-V, and PLM-V
are supplied to the transmitter side so that the proper VT overhead generation of REI-
V and RDI-V automatically occurs when enabled (see
DS1/E1 Demapping Function
The DS1/E1 Demapping function demaps a bit-asynchronously mapped DS1/E1
signal from the payload capacity of an L1 signal residing on the receive side byte-
wide data bus. The demapping is such that the extracted DS1/E1 is not
desynchronized or smoothed.
The DS1/E1 Demapping function buffers 1 byte of data approximately every 28,
6.48 MHz cycles for a DS1 or approximately every 21, 6.48 MHz cycles for an E1.
The data byte is serialized to an instantaneous rate of 3.24 MHz (8-bits serialized over
16, 6.48 MHz cycles). A gapped 3.24 MHz clock is generated due to bit gapping from
the I-bit mask and byte gapping between the serialized 8-bit data burst.
The gapped 3.24 MHz clock and serialized data interface to the DS1/E1 framers. The
clock/data relationship is such that the data is transmitted on the falling edge of the
clock.
Receive Time Slot Bus Interface
The Receive TSB Interface controls clear STS-1 data transfer to the TSB module. See
the TSB description in
mappings.
event register. An interrupt can be enabled based on the occurrence of this
Mindspeed Technologies™
BIP2CNTL
Low Byte
REIVL
Preliminary Information
Counter Register
Section 2.10.4.3
Table
High Byte
BIP2CNTH
REIVH
6-1).
for details of SONET/SDH channels to TSB
Event Register
RXVEVSTAT
RXVEVSTAT
RXVEVSTAT
RXVEVSTAT
Table
6-6).
Interrupt Enable
Functional Description
RXVEVINTEN
RXVEVINTEN
RXVEVINTEN
RXVEVINTEN
Register
2
-
15

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