cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 292

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

Register Description
8.4.4.3
The register offsets for each channel are listed in
Reset State
Lpbk_IS
8-162
—
7
0x00
Status for DS1/E1 MUX Loopback—When set to 1, indicates that a DS1/E1 loopback
command was detected in the DS2 stream for this channel.
—
6
DS1/E1 MUX Channel 1–28 Receive Interrupt Status
Table 8-52. Register Offsets—DS1/E1 MUX Channel 1–28 Receive Interrupt Status
Offset (Hex)
0x5507
0x5517
0x5527
0x5537
0x5547
0x5557
0x5567
0x550F
0x551F
0x552F
0x553F
0x554F
0x555F
0x556F
—
5
Mindspeed Technologies™
Preliminary Information
—
4
Table
Channel
8-53.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
—
3
Offset (Hex)
—
2
0x55D7
0x5577
0x557F
0x5587
0x558F
0x5597
0x559F
0x55A7
0x55AF
0x55B7
0x55BF
0x55C7
0x55CF
0x55DF
—
1
CX29503 Data Sheet
Channel
29503-DSH-002-B
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Lpbk_IS
0