cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 291

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
8.4.4.2
The register offsets for each channel are listed in
Reset State
FIFO_ OVRFL
FIFO_ UNDRN
29503-DSH-002-B
—
7
0x00
DS1/E1 FIFO Overflow—When set to 1, indicates that an overflow condition has occurred in
the FIFO logic.
DS1/E1 FIFO Underrun—When set to 1, indicates that an underrun condition has occurred in
the FIFO logic.
—
6
DS1/E1 MUX Channel 1–28 Transmit FIFO Status
Table 8-51. Register Offsets—DS1/E1 MUX Channel 1–28 Transmit FIFO Status
Offset (Hex)
0x5506
0x550E
0x5516
0x551E
0x5526
0x552E
0x5536
0x553E
0x5546
0x554E
0x5556
0x555E
0x5566
0x556E
—
5
Mindspeed Technologies™
Preliminary Information
—
4
Table
Channel
8-54.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
—
3
Offset (Hex)
—
2
0x55D6
0x55DE
0x5576
0x557E
0x5586
0x558E
0x5596
0x559E
0x55A6
0x55AE
0x55B6
0x55BE
0x55C6
0x55CE
FIFO_ UNDRN
1
Register Description
Channel
FIFO_ OVRFL
15
16
17
18
19
20
21
22
23
24
25
26
27
28
0
8
-
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