ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 18

• Manufacturer Part Number: ADUC7025BCPZ32-RL7
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

ADuC7019/20/21/22/24/25/26/27
Table 10. Pin Function Descriptions (ADuC7019/ADuC7020/ADuC7021/ADuC7022)
7019/7020
38
39
40
1
2
‒
‒
‒
‒
‒
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin No.
7021
37
38
39
40
1
2
3
4
‒
‒
5
6
7
‒
‒
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
7022
36
37
38
39
40
1
2
3
4
5
6
‒
‒
‒
‒
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Mnemonic
ADC0
ADC1
ADC2/CMP0
ADC3/CMP1
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
GND
DAC0/ADC12
DAC1/ADC13
DAC2/ADC14
DAC3/ADC15
TMS
TDI
BM/P0.0/CMP
P0.6/T1/MRST/PLAO[3]
TCK
TDO
IOGND
IOV
LV
DGND
P0.3/TRST/ADC
RST
IRQ0/P0.4/PWM
IRQ1/P0.5/ADC
P2.0/SPM9/PLAO[5]/CONV
P0.7/ECLK/XCLK/SPM8/PLAO[4]
XCLKO
DD
DD
REF
OUT
BUSY
BUSY
TRIP
/PLAI[7]
/PLAO[2]
/PLAO[1]
START
Rev. A | Page 18 of 92
Single-Ended or Differential Analog Input 0.
Single-Ended or Differential Analog Input 1.
Single-Ended or Differential Analog Input 2/Comparator Positive Input.
Single-Ended or Differential Analog Input 3 (Buffered Input on
ADuC7019)/Comparator Negative Input.
Single-Ended or Differential Analog Input 4.
Single-Ended or Differential Analog Input 5.
Single-Ended or Differential Analog Input 6.
Single-Ended or Differential Analog Input 7.
Single-Ended or Differential Analog Input 8.
Single-Ended or Differential Analog Input 9.
Ground Voltage Reference for the ADC. For optimal performance, the
analog power supply should be separated from IOGND and DGND.
DAC0 Voltage Output/Single-Ended or Differential Analog Input 12.
DAC1 Voltage Output/Single-Ended or Differential Analog Input 13.
DAC2 Voltage Output/Single-Ended or Differential Analog Input 14.
DAC3 Voltage Output on ADuC7020. On the ADuC7019, a 10 nF capacitor
needs to be connected between this pin and AGND/Single-Ended or
Differential Analog Input 15.
Test Mode Select, JTAG Test Port Input. Debug and download access.
Test Data In, JTAG Test Port Input. Debug and download access.
Multifunction I/O Pin.
Boot Mode (BM). The ADuC7019/20/21/22 enter serial download mode if
BM is low at reset and execute code if BM is pulled high at reset through a
1 kΩ resistor. General-Purpose Input and Output Port 0.0/Voltage
Comparator Output/Programmable Logic Array Input Element 7.
Multifunction Pin, Driven Low After Reset. General-Purpose Output Port
0.6/Timer1 Input/Power-On Reset Output/Programmable Logic Array
Output Element 3.
Test Clock, JTAG Test Port Input. Debug and download access.
Test Data Out, JTAG Test Port Output. Debug and download access.
Ground for GPIO. Typically connected to DGND.
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
2.6 V Output of the On-Chip Voltage Regulator. This output must be
connected to a 0.47 μf capacitor to DGND only.
Ground for Core Logic.
General-Purpose Input and Output Port 0.3/Test Reset, JTAG Test Port
Input/ ADC
Reset Input, Active Low.
Multifunction I/O Pin. External Interrupt Request 0, Active High/General-
Purpose Input and Output Port 0.4/PWM Trip External
Input/Programmable Logic Array Output Element 1.
Multifunction I/O Pin. External Interrupt Request 1, Active High/General-
Purpose Input andOutput Port 0.5/ADC
Logic Array Output Element 2.
Serial Port Multiplexed. General-Purpose Input and Output Port 2.0/UART/
Programmable Logic Array Output Element 5/Start Conversion Input Signal
for ADC.
Serial Port Multiplexed. General-Purpose Input and Output Port
0.7/Output for External Clock Signal/Input to the Internal Clock Generator
Circuits/UART/ Programmable Logic Array Output Element 4.
Output from the Crystal Oscillator Inverter.
Description
BUSY
Signal Output.
BUSY
Signa l Output/Programmable