ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 45

• Manufacturer Part Number: ADUC7025BCPZ32-RL7
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

FEECON is an 8-bit command register. The commands are
described in Table 21.
Table 21. Command Codes in FEECON
Code
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
1
The FEECON register always reads 0x07 immediately after execution of any
of these commands.
1
1
1
1
1
1
1
Command
Null
Single Read
Single Write
Erase/Write
Single Verify
Single Erase
Mass Erase
Burst Read
Burst
Read/Write
Erase Burst
Read/Write
Reserved
Signature
Protect
Reserved
Reserved
Ping
Description
Idle State.
Load FEEDAT with the 16-bit data.
Indexed by FEEADR.
Write FEEDAT at the address pointed by
FEEADR. This operation takes 20 μs.
Erase the page indexed by FEEADR and
write FEEDAT at the location pointed by
FEEADR. This operation takes 20 ms.
Compare the contents of the location
pointed by FEEADR to the data in
FEEDAT. The result of the comparison is
returned in FEESTA Bit 1.
Erase the page indexed by FEEADR.
Erase 62 kB of user space. The 2 kB of
kernel are protected. This operation
takes 2.48 seconds. To prevent accidental
execution, a command sequence is
required to execute this instruction. See
the Command Sequence for Executing a
Mass Erase section.
Default Command. No write is allowed.
This operation takes two cycles.
Write can handle a maximum of 8 data of
16 bits and takes a maximum of 8 x 20 μs.
Automatically erases the page indexed by
the write; writes pages without running
an erase command. This command takes
20 ms to erase the page + 20 μs per data
to write.
Reserved.
Give a signature of the 64 kB of Flash/EE
in the 24-bit FEESIGN MMR. This
operation takes 32,778 clock cycles.
This command can run only once. The
value of FEEPRO is saved and removed
only with a mass erase (0x06) or the key.
Reserved.
Reserved.
No operation; interrupt generated.
Rev. A | Page 45 of 92
FEEDAT Register
Name
FEEDAT
FEEDAT is a 16-bit data register.
FEEADR Register
Name
FEEADR
FEEADR is another 16-bit address register.
FEESIGN Register
Name
FEESIGN
FEESIGN is a 24-bit code signature.
FEEPRO Register
Name
FEEPRO
FEEPRO MMR provides immediate protection. It does not
require any software keys, see Table 22.
FEEHIDE Register
Name
FEEHIDE
FEEHIDE provides protection following subsequent reset of the
MMR. It requires a software key. See description in Table 22.
Table 22. FEEPRO and FEEHIDE MMR Bit Designations
Bit
31
30:0
Command Sequence for Executing a Mass Erase
FEEDAT=0x3CFF;
FEEADR = 0xFFC3;
FEEMOD= FEEMOD|0x8; //Erase key enable
FEECON=0x06;
Description
Read Protection. Cleared by user to protect all code.
Set by user to allow reading the code.
Write Protection for Pages 123 to 120, Pages 119 to 116,
and Pages 0 to 3. Cleared by user to protect the pages in
writing. Set by user to allow writing the pages.
ADuC7019/20/21/22/24/25/26/27
Address
0xFFFFF80C
Address
0xFFFFF810
Address
0xFFFFF818
Address
0xFFFFF81C
Address
0xFFFFF820
//Mass erase command
Default Value
0xXXXX
Default Value
0x0000
Default Value
0xFFFFFF
Default Value
0x00000000
Default Value
0xFFFFFFFF
Access
R/W
Access
R/W
Access
R
Access
R/W
Access
R/W