ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 8

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ADUC7025BCPZ32-RL7

Manufacturer Part Number
ADUC7025BCPZ32-RL7
Description
Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
Manufacturer
AD [Analog Devices]
Datasheet
ADuC7019/20/21/22/24/25/26/27
Parameter
INTERNAL OSCILLATOR
MCU CLOCK RATE
START-UP TIME
PROGRAMMABLE LOGIC ARRAY (PLA)
POWER REQUIREMENTS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
All ADC channel specifications are guaranteed during normal MicroConverter core operation.
Apply to all ADC input channels.
Measured using the factory set default values in ADCOF and ADCGN.
Not production tested but supported by design and/or characterization data on production release.
Measured using the factory set default values in ADCOF and ADCGN using an external AD845 op amp as an input buffer stage as shown in Figure 47. Based on
external ADC system components, the user may need to execute a system calibration to remove external endpoint errors and achieve these specifications (see the
Calibration section).
The input signal can be centered on any dc common-mode voltage (V
When using an external reference input pin, the internal reference must be disabled by setting the LSB in the REFCON memory mapped register to 0.
DAC linearity is calculated using a reduced code range of 100 to 3995.
DAC gain error is calculated using a reduced code range of 100 to internal 2.5 V V
supply, Sleep Mode: 3.6 V supply.
Endurance is qualified as per JEDEC Standard 22 method A117 and measured at −40°C, +25°C, +85°C, and +125°C.
Retention lifetime equivalent at junction temperature (T
Test carried out with a maximum of eight I/O set to a low output level.
Power supply current consumption is measured in normal, pause, and sleep modes under the following conditions: Normal Mode: 3.6 V supply, Pause Mode: 3.6 V
IOV
On the ADuC7019/20/21/22, this current must be added to AV
From 32 kHz Internal Oscillator
From 32 kHz External Crystal
At Power-On
From Pause/Nap Mode
From Sleep Mode
From Stop Mode
Pin Propagation Delay
Element Propagation Delay
Power Supply Voltage Range
AV
Analog Power Supply Currents
Digital Power Supply Current
Additional Power Supply Currents
Using an External Clock
DD
AV
DACV
IOV
IOV
IOV
ADC
DAC
DD
power supply current decreases typically by 2 mA during a flash/EE erase cycle.
− AGND and IOV
DD
DD
DD
DD
Current
DD
Current in Normal Mode
Current in Pause Mode
Current in Sleep Mode
Current
15
DD
13, 14
− IOGND
Min
0.05
0.05
2.7
J
) = 85°C as per JEDEC Standard 22 method A117. Retention lifetime derates with junction temperature.
DD
Typ
32.768
326
130
24
3.06
1.58
1.7
12
2.5
200
400
3
7
11
40
25
250
600
2
0.7
700
41.78
current.
CM
) as long as this value is within the ADC voltage input range specified.
Rev. A | Page 8 of 92
30
Max
±3
44
41.78
3.6
25
10
15
45
400
1000
REF
.
Unit
kHz
ms
ns
μs
ns
μA
mA
mA
μA
%
kHz
MHz
MHz
MHz
ms
ms
ns
V
μA
μA
mA
mA
μA
μA
mA
mA
Test Conditions/Comments
CD = 7
CD = 0
T
T
Core clock = 41.78 MHz
CD = 0
CD = 7
From input pin to output pin
ADC in idle mode; all parts except ADuC7019
ADC in idle mode; ADuC7019 only
Code executing from Flash/EE
CD = 7
CD = 3
CD = 0 (41.78 MHz clock)
CD = 0 (41.78 MHz clock)
T
T
@ 1 MSPS
@ 62.5 kSPS
per DAC
A
A
A
A
= 85°C
= 125°C
= 85°C
= 125°C

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