ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 83

• Manufacturer Part Number: ADUC7025BCPZ32-RL7
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

HARDWARE DESIGN CONSIDERATIONS
POWER SUPPLIES
The ADuC7019/7020/7021/7022/7024/7025/7026/7027
operational power supply voltage range is 2.7 V to 3.6 V.
Separate analog and digital power supply pins (AV
IOV
noisy digital signals often present on the system IOV
this mode, the part can also operate with split supplies, that is,
using different voltage levels for each supply. For example, the
system can be designed to operate with an IOV
of 3.3 V while the AV
typical split supply configuration is shown in Figure 73.
As an alternative to providing two separate power supplies, the
user can reduce noise on AV
and/or ferrite bead between AV
decouple AV
configuration is shown in Figure 74. With this configuration,
other analog circuitry (such as op amps, voltage reference, and
others) can be powered from the AV
DIGITAL SUPPLY
+
–
DD
, respectively) allow AV
DIGITAL
SUPPLY
10μF
+
–
0.1 μ F
0.1μF
Figure 74. External Single Supply Connections
DD
Figure 73. External Dual Supply Connections
10 μ F
separately to ground. An example of this
26
54
25
53
IOV
IOGND
26
54
25
53
DD
ADuC7026
DD
level can be at 3 V, or vice versa. A
IOV
IOGND
ADuC7026
DD
DACGND
REFGND
DACV
GND
DD
BEAD
AGND
DD
AV
DACGND
REFGND
by placing a small series resistor
DACV
GND
DD
REF
DD
DD
to be kept relatively free of
AGND
AV
and IOV
REF
73
74
75
70
71
67
8
DD
DD
DD
73
74
75
70
71
67
supply line as well.
8
1.6Ω
DD
, and then
10 μ F
DD
10μF
voltage level
ANALOG
SUPPLY
DD
DD
and
0.1 μ F
line. In
+
–
0.1μF
Rev. A | Page 83 of 92
Notice that in both Figure 73 and Figure 74, a large value
(10 μF) reservoir capacitor sits on IOV
capacitor sits on AV
capacitors are located at each AV
As per standard design practice, be sure to include all of these
capacitors and ensure the smaller capacitors are close to each
AV
ground terminal of each of these capacitors directly to the
underlying ground plane. Finally, note that the analog and
digital ground pins on the ADuC7019/7020/7021/7022/
7024/7025/7026/7027 must be referenced to the same system
ground reference point at all times.
Linear Voltage Regulator
Each ADuC7019/7020/7021/7022/7024/7025/7026/7027
requires a single 3.3 V supply, but the core logic requires a 2.6 V
supply. An on-chip linear regulator generates the 2.6 V from
IOV
core logic. An external compensation capacitor of 0.47 μF must
be connected between LV
these pins) to act as a tank of charge as shown Figure 75.
The LV
recommended to use excellent power supply decoupling on
IOV
chip voltage regulator.
DD
DD
DD
pin with trace lengths as short as possible. Connect the
for the core logic. LV
to help improve line regulation performance of the on-
DD
pin should not be used for any other chip. It is also
ADuC7019/20/21/22/24/25/26/27
Figure 75. Voltage Regulator Connections
0.47μF
DD
. In addition, local small-value (0.1 μF)
DD
27
28
DD
and DGND (as close as possible to
LV
DGND
Pin 21 is the 2.6 V supply for the
ADuC7026
DD
DD
and IOV
DD
, and a separate 10 μF
DD
pin of the chip.