ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 37

• Manufacturer Part Number: ADUC7025BCPZ32-RL7
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

ADC CIRCUIT OVERVIEW
The analog-to-digital converter (ADC) incorporates a fast,
multichannel, 12-bit ADC. It can operate from 2.7 V to 3.6 V
supplies and is capable of providing a throughput of up to 1 MSPS
when the clock source is 41.78 MHz. This block provides the user
with a multichannel multiplexer, differential track-and-hold, on-
chip reference, and ADC.
The ADC consists of a 12-bit successive approximation
converter based around two capacitor DACs. Depending on the
input signal configuration, the ADC can operate in one of three
different modes:
•
•
•
The converter accepts an analog input range of 0 to V
operating in single-ended mode or pseudo differential mode. In
fully differential mode, the input signal must be balanced
around a common-mode voltage V
and with a maximum amplitude of 2 V
A high precision, low drift, and factory calibrated 2.5 V
reference is provided on-chip. An external reference can also be
connected as described later in the Band Gap Reference section.
Single or continuous conversion modes can be initiated in the
software. An external CONV
the on-chip PLA, or a Timer0 or Timer1 overflow can also be
used to generate a repetitive trigger for ADC conversions.
A voltage output from an on-chip band gap reference
proportional to absolute temperature can also be routed
through the front-end ADC multiplexer, effectively an
additional ADC channel input. This facilitates an internal
temperature sensor channel, which measures die temperature to
an accuracy of ±3°C.
Figure 36. Examples of Balanced Signals in Fully Differential Mode
Fully differential mode, for small and balanced signals
Single-ended mode, for any single-ended signals
Pseudo differential mode, for any single-ended signals,
taking advantage of the common-mode rejection offered
by the pseudo differential input
AV
V
CM
DD
0
V
CM
START
2V
V
CM
REF
pin, an output generated from
CM
, in the range 0 V to AV
REF
(see Figure 36).
2V
REF
2V
REF
REF
when
Rev. A | Page 37 of 92
DD
,
TRANSFER FUNCTION
Pseudo Differential and Single-Ended Modes
In pseudo differential or single-ended modes, the input range is
0 V to V
differential and single-ended modes with
The ideal code transitions occur midway between successive
integer LSB values (that is, 1/2 LSB, 3/2 LSB, 5/2 LSB, … ,
FS − 3/2 LSB). The ideal input/output transfer characteristic
is shown in Figure 37.
Fully Differential Mode
The amplitude of the differential signal is the difference
between the signals applied to the V
V
is therefore –V
regardless of the common mode (CM). The common mode is
the average of the two signals, for example, (V
is therefore the voltage that the two inputs are centered on. This
results in the span of each input being CM ± V
voltage has to be set up externally and its range varies with V
(see the Driving the Analog Inputs section).
The output coding is twos complement in fully differential
mode with 1 LSB = 2 V
when V
between successive integer LSB values (that is, 1/2 LSB, 3/2 LSB,
5/2 LSB, … , FS – 3/2 LSB). The ideal input/output transfer
characteristic is shown in Figure 38.
IN+
– V
1 LSB = FS/4096, or
2.5 V/4096 = 0.61 mV, or
610 μV when V
1111 1111 1111
1111 1111 1110
1111 1111 1101
1111 1111 1100
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
Figure 37. ADC Transfer Function in Pseudo Differential Mode
REF
IN–
REF
). The maximum amplitude of the differential signal
= 2.5 V. The designed code transitions occur midway
. The output coding is straight binary in pseudo
ADuC7019/20/21/22/24/25/26/27
REF
to +V
0V
1LSB
REF
1LSB =
or Single-Ended Mode
REF
= 2.5 V
REF
/4096 or 2 × 2.5 V/4096 = 1.22 mV
p-p (that is, 2 × V
4096
FS
VOLTAGE INPUT
IN+
and V
REF
IN–
IN+
REF
). This is
pins (that is,
+FS – 1LSB
+ V
/2. This
IN–
)/2, and
REF