ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 39

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ADUC7025BCPZ32-RL7

Manufacturer Part Number
ADUC7025BCPZ32-RL7
Description
Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
Manufacturer
AD [Analog Devices]
Datasheet
Table 14. ADCCON MMR Bit Designations
Bit
15:13
12:10
9:8
7
6
5
4:3
2:0
Value
000
001
010
011
100
101
00
01
10
11
00
01
10
11
000
001
010
011
100
101
Other
Description
Reserved.
ADC clock speed.
fADC/1. This divider is provided to obtain
1 MSPS ADC with an external clock <41.78 MHz.
fADC/2 (default value).
fADC/4.
fADC/8.
fADC/16.
fADC/32.
ADC acquisition time.
2 clocks.
4 clocks.
8 clocks (default value).
16 clocks.
Enable start conversion.
Set by the user to start any type of conversion
command. Cleared by the user to disable a
start conversion (clearing this bit does not
stop the ADC when continuously converting).
Enable ADC
Set by the user to enable the ADC
Cleared by the user to disable the ADC
ADC power control.
Set by the user to place the ADC in normal
mode (the ADC must be powered up for at least
5 μs before it converts correctly). Cleared by the
user to place the ADC in power-down mode.
Conversion mode.
Single-ended mode.
Differential mode.
Pseudo differential mode.
Reserved.
Conversion type.
Enable CONV
Enable Timer1 as a conversion input.
Enable Timer0 as a conversion input.
Single software conversion; sets to 000 after
conversion (Bit 7 of ADCCON MMR should be
cleared after starting a single software
conversion to avoid further conversions
triggered by the CONV
Continuous software conversion.
PLA conversion.
Reserved.
BUSY
START
.
pin as a conversion input.
START
pin).
BUSY
pin.
BUSY
Rev. A | Page 39 of 92
pin.
ADCCP Register
Name
ADCCP
ADCCP is an ADC positive channel selection register. This
MMR is described in Table 15.
Table 15. ADCCP
Bit
7:5
4:0
1
ADC and DAC channel availability depends on part model. See the Ordering
Guide for details.
Value
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
Others
ADuC7019/20/21/22/24/25/26/27
Address
0xFFFF0504
1
Description
Reserved
Positive channel selection bits
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
ADC10
ADC11
DAC0/ADC12
DAC1/ADC13
DAC2/ADC14
DAC3/ADC15
Temperature sensor
AGND (self-diagnostic feature)
Internal reference (self-diagnostic feature)
AV
Reserved
MMR Bit Designation
DD
/2
Default Value
0x00
Access
R/W

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