ADUC7025BCPZ32-RL7 AD [Analog Devices], ADUC7025BCPZ32-RL7 Datasheet - Page 61

• Manufacturer Part Number: ADUC7025BCPZ32-RL7
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

GPxCON are the port x control registers, which select the
function of each pin of port x. as described in Table 40.
Table 40. GPxCON MMR Bit Descriptions
Bit
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
GPxPAR Registers
Name
GP0PAR
GP1PAR
GP3PAR
GPxPAR program the parameters for Port 0, Port 1, and Port 3.
Note that the GPxDAT MMR must always be written after
changing the GPxPAR MMR.
Table 41. GPxPAR MMR Bit Descriptions
Bit
31:29
28
27:25
24
23:21
20
19:17
16
15:13
12
11:9
8
7:5
4
3:1
0
Description
Reserved
Select Function of Px.7 Pin
Reserved
Select Function of Px.6 Pin
Reserved
Select Function of Px.5 Pin
Reserved
Select Function of Px.4 Pin
Reserved
Select Function of Px.3 Pin
Reserved
Select Function of Px.2 Pin
Reserved
Select Function of Px.1 Pin
Reserved
Select Function of Px.0 Pin
Address
0xFFFFF42C
0xFFFFF43C
0xFFFFF45C
Description
Reserved
Pull-Up Disable Px.7
Reserved
Pull-Up Disable Px.6
Reserved
Pull-Up Disable Px.5
Reserved
Pull-Up Disable Px.4
Reserved
Pull-Up Disable Px.3
Reserved
Pull-Up Disable Px.2
Reserved
Pull-Up Disable Px.1
Reserved
Pull-Up Disable Px.0
Default Value
0x20000000
0x00000000
0x00222222
Access
R/W
R/W
R/W
Rev. A | Page 61 of 92
GPxDAT Registers
Name
GP0DAT
GP1DAT
GP2DAT
GP3DAT
GP4DAT
GPxDAT are port x configuration and data registers. They
configure the direction of the GPIO pins of port x, set the
output value for the pins configured as output, and store the
input value of the pins configured as input.
Table 42. GPxDAT MMR Bit Descriptions
Bit
31:24
23:16
15:8
7:0
GPxSET Registers
Name
GP0SET
GP1SET
GP2SET
GP3SET
GP4SET
GPxSET are data set port x registers.
Table 43. GPxSET MMR Bit Descriptions
Bit
31:24
23:16
15:0
GPxCLR Registers
Name
GP0CLR
GP1CLR
GP2CLR
GP3CLR
GP4CLR
GPxCLR are data clear port x registers.
Table 44. GPxCLR MMR Bit Descriptions
Bit
31:24
23:16
15:0
ADuC7019/20/21/22/24/25/26/27
Description
Direction of the Data. Set to 1 by user to configure
the GPIO pin as an output. Cleared to 0 by user to
configure the GPIO pin as an input.
Port x Data Output.
Reflect the State of Port x Pins at Reset (read only).
Port x Data Input (read only).
Description
Reserved.
Data Port x Set Bit. Set to 1 by user to set bit on port
x; also sets the corresponding bit in the GPxDAT
MMR. Cleared to 0 by user; does not affect the data out.
Reserved.
Description
Reserved.
Data Port x Clear Bit. Set to 1 by user to clear bit on
port x; also clears the corresponding bit in the
GPxDAT MMR. Cleared to 0 by user; does not affect
the data out.
Reserved.
Address
0xFFFFF420
0xFFFFF430
0xFFFFF440
0xFFFFF450
0xFFFFF460
Address
0xFFFFF424
0xFFFFF434
0xFFFFF444
0xFFFFF454
0xFFFFF464
Address
0xFFFFF428
0xFFFFF438
0xFFFFF448
0xFFFFF458
0xFFFFF468
Default Value
0x000000XX
0x000000XX
0x000000XX
0x000000XX
0x000000XX
Default Value
0x000000XX
0x000000XX
0x000000XX
0x000000XX
0x000000XX
Default Value
0x000000XX
0x000000XX
0x000000XX
0x000000XX
0x000000XX
Access
R/W
R/W
R/W
R/W
R/W
Access
W
W
W
W
W
Access
W
W
W
W
W