HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 17

• Manufacturer Part Number: HD6435348R
• Description: Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

C-1 (g) Schematic Diagram of Port 1, Pin P1
C-1 (h) Schematic Diagram of Port 1, Pin P1
C-2
C-3
C-4
C-5
C-6 (a) Schematic Diagram of Port 6, Pin P6
C-6 (b) Schematic Diagram of Port 6, Pin P6
C-7 (a) Schematic Diagram of Port 7, Pin P7
C-7 (b) Schematic Diagram of Port 7, Pins P7
C-7 (c) Schematic Diagram of Port 7, Pin P7
C-7 (d) Schematic Diagram of Port 7, Pins P7
C-7 (e) Schematic Diagram of Port 7, Pin P7
C-8
C-9 (a) Schematic Diagram of Port 9, Pins P9
C-9 (b) Schematic Diagram of Port 9, Pin P9
C-9 (c) Schematic Diagram of Port 9, Pin P9
C-9 (d) Schematic Diagram of Port 9, Pin P9
C-9 (e) Schematic Diagram of Port 9, Pin P9
C-9 (f) Schematic Diagram of Port 9, Pin P9
C-9 (g) Schematic Diagram of Port 9, Pin P9
E-1
E-2
E-3
E-4
E-5
G-1
G-2
G-3
G-4
Tables
1-1
1-2
1-3
1-4
2-1
2-2
3-1
3-2
3-3
Schematic Diagram of Port 2 ·························································································444
Schematic Diagram of Port 3 ·························································································445
Schematic Diagram of Port 4 ·························································································446
Schematic Diagram of Port 5 ·························································································447
Schematic Diagram of Port 8 ·························································································455
Reset during Memory Access (Mode 1) ········································································469
Reset during Memory Access (Mode 2) ········································································470
Reset during Memory Access (Mode 3) ········································································472
Reset during Memory Access (Mode 4) ········································································473
Reset during Memory Access (Mode 7) ········································································474
Package Dimensions (CP-84) ························································································476
Package Dimensions (CG-84) ·······················································································476
Package Dimensions (FP-80A) ······················································································477
Package Dimensions (TFP-80C) ···················································································477
Features ······························································································································2
Pin Arrangements in Each Operating Mode (CP-84, CG-84) ···········································9
Pin Arrangements in Each Operating Mode (FP-80A, TFP-80C) ···································13
Pin Functions ···················································································································17
Operating Modes ·············································································································23
Mode Control Register ····································································································27
Interrupt Mask Levels ······································································································36
Interrupt Mask Bits after an Interrupt is Accepted ··························································36
Initial Values of Registers ································································································41
6
7
0
1
0
3
7
2
3
4
5
6
7
1
4
0
to P6
, P7
··········································································442
··········································································443
··········································································448
··········································································450
··········································································452
··········································································454
··········································································457
··········································································458
··········································································459
··········································································460
··········································································461
··········································································462
and P7
and P9
5
3
and P7
································································449
2
1
···························································451
···························································456
6
····················································453