HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 272

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
Bit
Read/Write
Bit
Initial value
Read/Write
Bit
Read/Write
14.2 Register Descriptions
14.2.1 Receive Shift Register (RSR)
The RSR receives incoming data bits. When one data character has been received, it is transferred
to the receive data register (RDR).
The CPU cannot read or write the RSR directly.
14.2.2 Receive Data Register (RDR)—H'FEDD, H'FEF5
The RDR stores received data. As each character is received, it is transferred from the RSR to the
RDR, enabling the RSR to receive the next character. This double-buffering allows the SCI to
receive data continuously.
The CPU can read but not write the RDR. The RDR is initialized to H'00 at a reset and in the
standby modes.
14.2.3 Transmit Shift Register (TSR)
The TSR holds the character currently being transmitted. When transmission of this character is
completed, the next character is moved from the transmit data register (TDR) to the TSR and
transmission of that character begins. If the TDR does not contain valid data, the SCI stops
transmitting.
The CPU cannot read or write the TSR directly.
R
7
7
0
7
R
6
6
0
6
R
5
5
0
5
258
R
4
4
0
4
R
3
3
0
3
R
2
2
0
2
R
1
1
0
1
R
0
0
0
0

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