HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 446

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
SBYCR—Software Standby Control Register
Bit
Initial value
Read/Write
MDCR—Mode Control Register
Bit
Initial value
Read/Write
* Initialized according to the inputs at pins MD
RSTCSR—Reset Status/Control Register
Bit
Initial value
Read/Write
* Software can write a 0 in bit 7 to clear the flag but cannot write a 1.
R/(W)*
SSBY
WRST
R/W
7
0
7
1
7
0
Software Standby
Watchdog Timer Reset
0 SLEEP instruction causes transition to sleep mode.
1 SLEEP instruction causes transition to software standby mode.
0 Cleared from 1 to 0 by software, or by a Low input at the RES pin.
1 Set to 1 when TCNT overflows and a reset signal is generated.
RSTOE
R/W
6
1
6
1
6
0
Reset Output Enable
0 The reset signal is not output externally.
1 The reset signal is output externally.
5
1
5
0
5
1
436
2
, MD
4
1
4
0
4
1
1
, and MD
H'FF13
H'FF12
H'FF15
3
1
3
0
3
1
0
.
MDS2
—*
2
1
R
2
2
1
Mode Select
Value input at mode pins
MDS1
—*
1
1
R
1
1
1
MDS0
—*
WDT
R
0
1
0
0
1

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