HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 434

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
*1 Read address
*2 Write address
*3 Only writing of 0 to clear the flag is enabled.
*4 Times in parentheses are the times for TCNT to increment from H'00 to H'FF and change to
TCSR—Timer Status/Control Register
Bit
Initial value
Read/Write
H'00 again when ø = 10 MHz.
R/(W)
OVF
7
0
*3
Overflow Flag
0 Cleared from 1 to 0 when CPU reads OVF = 1, then wtites 0
1 Set to 1 when TCNT changes from H'FF to H'00.
WT/IT
in OVF.
R/W
6
0
Timer Mode Select
0 Interval timer mode (IRQ
1 Watchdog timer mode (NMI interrupt request)
TME
R/W
5
0
Timer Enable
0 Timer is disabled.
1 Timer is enabled.
424
• TCNT is initialized to H'00 and stopped.
• TCNT starts incrementing.
• CPU interrupt request is enabled.
4
1
H'FEEC
3
1
0
interrupt request)
*1
0 0 0 ø/2
0 0 1 ø/32
0 1 0 ø/64
0 1 1 ø/128
1 0 0 ø/256
1 0 1 ø/512
1 1 0 ø/2048 (52.4 ms)
1 1 1 ø/4096 (104.9 ms)
, H'FEED
CKS2
R/W
2
0
Clock Select
CKS1
*2
R/W
1
0
(51.2 µs)
(819.2 µs)
(1.6 ms)
(3.3 ms)
(6.6 ms)
(13.1 ms)
CKS0
R/W
WDT
0
0
*4

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