HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 425

• Manufacturer Part Number: HD6435348R
• Description: Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

TCSR—Timer Control/Status Register
Bit
Initial value
Read/Write
*1 Only writing of 0 to clear the flag is enabled.
*2 When all four bits (OS3 to OS0) are cleared to 0, output is disabled.
R/(W)
CMFB
7
0
*1
Compare-Match Flag B
R/(W)
0 Cleared from 1 to 0 when:
1 Set to 1 when TCNT = TCORB.
CMFA
6
0
1. CPU reads CMFB = 1, then writes 0 in CMFB.
2. CMB interrupt is served by the DTC.
*1
Compare-Match Flag A
R/(W)
0 Cleared from 1 to 0 when:
1 Set to 1 when TCNT = TCORA.
OVF
5
0
1. CPU reads CMFA = 1, then writes 0 in CMFA.
2. CMA interrupt is served by the DTC.
Timer Overflow Flag
*1
0 Cleared from 1 to 0 when CPU reads OVF = 1,
1 Set to 1 when TCNT changes from H'FF to H'00.
then writes 0 in OVF.
Output Select
0 0 No change on compare-match A.
0 1 Output 0 on compare-match A.
1 0 Output 1 on compare-match A.
1 1 Invert (toggle) output on compare-match A.
0 0 No change on compare-match B.
0 1 Output 0 on compare-match B.
1 0 Output 1 on compare-match B.
1 1 Invert (toggle) output on compare-match B.
415
—
—
4
1
H'FED1
OS3
R/W
3
0
*2
OS2
R/W
2
0
*2
Output Select
OS1
R/W
1
0
*2
OS0
R/W
TMR
0
0
*2