HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 356

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
Table 20-9 (2) Control Signal Timing (S-Mask Versions)
Condition B (5-V S-mask):
Condition C (3-V S-mask):
Condition D (2.7-V S-mask): V
Item
RES setup time
RES pulse width 1*
RES pulse width 2*
RES output delay time t
RES output pulse width t
NMI setup time
NMI hold time
IRQ
IRQ
IRQ
A/D trigger setup time
A/D trigger hold time
NMI pulse width
(for recovery from
software standby
mode)
Crystal oscillator
settling time (reset)
Crystal oscillator
settling time
(software standby)
Note: * t
0
1
1
setup time
setup time
hold time
(RSTCSR) is set to 1. t
RESW2
applies at power-on and when the RSTOE bit in the reset contol/status register
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
RESS
RESW1
RESW2
RESD
RESOW
NMIS
NMIH
IRQ0S
IRQ1S
IRQ1H
TRGS
TRGH
NMIW
OSC1
OSC2
V
T
T
V
T
T
RESW1
a
a
a
a
CC
CC
CC
= –20 to +75˚C (Regular Specifications),
= –40 to +85˚C (Wide-Range Specifications)
= –20 to +75˚C (Regular Specifications)
= –20 to +75˚C (Regular Specifications)
Condition D Condition C
Min
200
6.0
520
132
200
10
50
50
10
50
10
200
20
10
= 5.0 V ±10%, ø = 2.0 to 16 MHz, V
= 3.0 to 5.5 V, ø = 2.0 to 10 MHz, V
= 2.7 to 5.5 V, ø = 2.0 to 8 MHz, V
8 MHz
applies when RSTOE is cleared to 0.
Max
100
345
Min
10
50
50
10
50
10
20
10
200
6.0
520
132
200
200
10 MHz
Max
100
Condition B
Min
10
50
50
10
50
10
20
10
200
6.0
520
132
150
200
16 MHz
SS
SS
Max
100
SS
= 0 V,
= 0 V,
= 0 V,
Unit
ns
ns
ns
ns
ns
ns
ms
ms
ns
t
t
ns
t
ns
ns
cyc
cyc
cyc
–Preliminary–
Test
Conditions
See figure
20-7
See figure
20-8
See figure
20-9
See figure
20-22
See figure
20-12
See figure
18-1

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