HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 273

• Manufacturer Part Number: HD6435348R
• Description: Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
14.2.4 Transmit Data Register (TDR)—H'FEDB, H'FEF3
The TDR is an 8-bit readable/writable register that holds the next character to be transmitted.
When the TSR becomes empty, the character written in the TDR is transferred to the TSR.
Continuous data transmission is possible by writing the next byte in the TDR while the current
byte is being transmitted from the TSR.
The TDR is initialized to H'FF at a reset and in the standby modes.
14.2.5 Serial Mode Register (SMR)—H'FED8, H'FEF0
The SMR is an 8-bit readable/writable register that controls the communication format and selects
the clock rate for the internal clock source. It is initialized to H'04 at a reset and in the standby
modes.
Bit 7—Communication Mode (C/A): This bit selects the asynchronous or synchronous
communication mode.
Bit 7
C/A
0
1
Bit 6—Character Length (CHR): This bit selects the character length in asynchronous mode. It
is ignored in synchronous mode.
Bit 6
CHR
0
1
Description
Asynchronous communication.
Communication is synchronized with the serial clock.
Description
8 Bits per character.
7 Bits per character.
R/W
R/W
C/A
7
1
7
0
CHR
R/W
R/W
6
1
6
0
R/W
R/W
PE
5
1
5
0
259
R/W
R/W
O/E
4
1
4
0
STOP
(Initial value)
(Initial value)
R/W
R/W
3
1
3
0
R/W
—
—
2
1
2
1
CKS1
R/W
R/W
1
1
1
0
CKS0
R/W
R/W
0
1
0
0