HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 389

• Manufacturer Part Number: HD6435348R
• Description: Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

A.3 Operation Code Map
Tables A-2 through A-6 are maps of the operation codes. Table A-2 shows the meaning of the first byte of the instruction code, indicating
both operation codes and addressing modes. Tables A-2 through A-6 indicate the meanings of operation codes in the second and third bytes.
Table A-2 Operation Codes in Byte 1
H I
Notes:
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
LO
*
References to tables A-3 through A-6 indicate that the instruction code has one or more additional bytes, described in those tables.
H'11 is the first operation code byte of the following instructions:
JMP, JSR, PJSR (register indirect addressing mode)
JMP, JSR (register indirect addressing mode with displacement)
PRTS, PRTD (all addressing modes)
NOP
JMP
BRA
d:8
BRA
d:16
R0
0
SCB/F
See
Tbl.
A-6
See
Tbl.
A-6
*
BRN
BRN
R1
1
MOV:F.B @ (d:8, R6), Rn
MOV:F.B Rn, @ (d:8, R6)
MOV:E #xx:8, Rn
MOV:L.B @aa:8, Rn
MOV:S.B Rn, @aa:8
LDM
STM
BHI
BHI
Rn
@–Rn
@Rn+
@Rn
@(d:8,Rn)
@(d:16,Rn)
2
R2
PJSR
@aa:24
PJMP
@aa:24
BLS
BLS
CMP:E #xx:8, Rn
R3
3
#xx:8
See
Tbl.
A-5
RTD
#xx:8
Bcc
Bcc
R4
4
#aa:8.B
See
Tbl.
A-4
@aa:16.B
See
Tbl.
A-4
BCS
BCS
(Byte)
(Byte)
(Byte)
(Byte)
(Byte)
(Byte)
R5
5
SCB/NE SCB/EQ TRAPA
See
Tbl.
A-6
BNE
BNE
See Table A-3
See Table A-4
See Table A-4
See Table A-4
See Table A-4
See Table A-4
R6
6
See
Tbl.
A-6
LINK
#xx:8
BEQ
BEQ
R7
7
JSR
BVC
BVC
R0
8
TRAP/V S
RTS
BVS
BVS
R1
9
MOV:I #xx:16, Rn
MOV:L.W @aa:8, Rn
MOV:S.W Rn, @aa:8
MOV:F.W @ (:8, R6), Rn
MOV:F.W Rn, @ (d:8,R6)
RTE
SLEEP
BPL
BPL
Rn
@–Rn
@Rn+
@Rn
@(d:8,Rn)
@(d:16,Rn)
A
R2
BMI
BMI
R3
B
CMP:I #xx:16, Rn
(Word)
(Word)
(Word)
(Word)
(Word)
(Word)
#xx:16 @aa:8.W
See
Tbl.
A-5
RTD
#xx:16
BGE
BGE
C
R4
@aa:16.W BSR
See
Tbl.
A-4
See
Tbl.
A-4
BLT
BLT
R5
D
BSR
d:8
d:16
BGT
BGT
See Table A-3
See Table A-4
See Table A-4
See Table A-4
See Table A-4
See Table A-4
R6
E
UNLK
LINK
#xx:16
BLE
BLE
R7
F