XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 13

• Manufacturer Part Number: XQ2V3000
• Description: QPro Virtex-II 1.5V Military QML Platform FPGAs
• Manufacturer: Xilinx

Table 10
Table 10: Summary of Voltage Supply Requirements
for All Input and Output Standards
DS122 (v1.1) January 7, 2004
Product Specification
I/O Standard
LVDS_33
LVDSEXT_33
LVPECL_33
SSTL3_I
SSTL3_II
AGP
LVTTL
LVCMOS33
LVDCI_33
LVDCI_DV2_33
PCI33_3
PCI66_3
PCIX
LVDS_33_DCI
LVDSEXT_33_DCI
SSTL3_I_DCI
SSTL3_II_DCI
LVDS_25
LVDSEXT_25
LDT_25
ULVDS_25
BLVDS_25
SSTL2_I
SSTL2_II
LVCMOS25
LVDCI_25
LVDCI_DV2_25
LVDS_25_DCI
LVDSEXT_25_DCI
SSTL2_I_DCI
SSTL2_II_DCI
Incompatible example:
summarizes all standards and voltage supplies.
R
HSTL_I_DCI input and HSTL_II_DCI input
Output
3.3
2.5
V
CCO
Input
N/R
N/R
3.3
2.5
N/R
Input
V
1.32
1.25
1.25
1.25
1.25
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
1.5
1.5
1.5
1.5
REF
(1)
Output
Termination Type
Series
Series
Series
Series
Split
Split
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
Input
Split
Split
Split
Split
Split
Split
Split
Split
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
www.xilinx.com
1-800-255-7778
The implementation tools will enforce these design rules.
Table 10: Summary of Voltage Supply Requirements
for All Input and Output Standards (Continued)
Digitally Controlled Impedance (DCI)
Today’s chip output signals with fast edge rates require ter-
mination to prevent reflections and maintain signal integrity.
Notes:
1.
I/O Standard
HSTL_III_18
HSTL_IV_18
HSTL_I_18
HSTL_II_18
SSTL18_I
SSTL18_II
LVCMOS18
LVDCI_18
LVDCI_DV2_18
HSTL_III_DCI_18
HSTL_IV_DCI_18
HSTL_I_DCI_18
HSTL_II_DCI_18
SSTL18_I_DCI
SSTL18_II_DCI
HSTL_III
HSTL_IV
HSTL_I
HSTL_II
LVCMOS15
LVDCI_15
LVDCI_DV2_15
GTLP_DCI
HSTL_III_DCI
HSTL_IV_DCI
HSTL_I_DCI
HSTL_II_DCI
GTL_DCI
GTLP
GTL
N/R = no requirement.
QPro Virtex-II 1.5V Military QML Platform FPGAs
Output
N/R
1.8
1.5
1.2
V
CCO
Input
N/R
N/R
N/R
1.8
1.5
1.2
Input
V
0.75
0.75
0.75
0.75
N/R
N/R
N/R
N/R
N/R
N/R
1.1
1.1
0.9
0.9
0.9
0.9
1.1
1.1
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.8
0.8
REF
1
1
Output
Termination Type
Series
Series
Series
Series
Single
Single
Single
Single
Split
Split
Split
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
Single
Single
Single
Single
Single
Single
Input
Split
Split
Split
Split
Split
Split
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
13