XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 25

• Manufacturer Part Number: XQ2V3000
• Description: QPro Virtex-II 1.5V Military QML Platform FPGAs
• Manufacturer: Xilinx

Sum of Products
Each Virtex-II slice has a dedicated OR gate named ORCY,
ORing together outputs from the slices carryout and the ORCY
from an adjacent slice. The ORCY gate with the dedicated
Sum of Products (SOP) chain are designed for implementing
large, flexible SOP chains. One input of each ORCY is con-
nected through the fast SOP chain to the output of the previous
ORCY in the same slice row. The second input is connected to
DS122 (v1.1) January 7, 2004
Product Specification
4
4
4
4
R
LUT
LUT
LUT
LUT
4
4
4
4
MUXCY
MUXCY
MUXCY
MUXCY
ORCY
Slice 1
Slice 0
V
CC
4
4
4
4
LUT
LUT
LUT
LUT
Figure 27: Wide-Input AND Gate (16 Inputs)
LUT
LUT
LUT
LUT
Figure 26: Horizontal Cascade Chain
MUXCY
MUXCY
MUXCY
MUXCY
ORCY
Slice 3
Slice 2
V
CC
“0”
“0”
“0”
CLB
0
0
0
0
MUXCY
MUXCY
MUXCY
MUXCY
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V CC
1
1
1
1
4
4
4
4
Slice
Slice
the output of the top MUXCY in the same slice, as shown in
Figure
LUTs and MUXCYs can implement large AND gates or
other combinatorial logic functions.
LUT and MUXCY resources configured as a 16-input AND
gate.
LUT
LUT
LUT
LUT
OUT
26.
QPro Virtex-II 1.5V Military QML Platform FPGAs
MUXCY
MUXCY
MUXCY
MUXCY
ORCY
Slice 1
Slice 0
V
CC
16
4
4
4
4
LUT
LUT
LUT
LUT
AND
DS031_41_110600
MUXCY
MUXCY
MUXCY
MUXCY
OUT
ORCY
Slice 3
Slice 2
V
Figure 27
CC
CLB
ds031_64_110300
SOP
illustrates
25