XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 22

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XQ2V3000

Manufacturer Part Number
XQ2V3000
Description
QPro Virtex-II 1.5V Military QML Platform FPGAs
Manufacturer
Xilinx
Datasheet

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QPro Virtex-II 1.5V Military QML Platform FPGAs
Shift Registers
Each function generator can also be configured as a 16-bit
shift register. The write operation is synchronous with a
clock input (CLK) and an optional clock enable, as shown in
Figure
4-bit address bus, A[3:0]. The configurable 16-bit shift regis-
ter cannot be set or reset. The read is asynchronous, how-
ever, the storage element or flip-flop is available to
implement a synchronous read. The storage element
should always be used with a constant address. For exam-
ple, when building an 8-bit shift register and configuring the
addresses to point to the seventh bit, the eighth bit can be
the flip-flop. The overall system performance is improved by
using the superior clock-to-out of the flip-flops.
An additional dedicated connection between shift registers
allows connecting the last bit of one shift register to the first
bit of the next, without using the ordinary LUT output. (See
Figure
access to any bit in the chain. The shift register chaining
and the MUXF5, MUXF6, and MUXF7 multiplexers allow up
to a 128-bit shift register with addressable access to be
implemented in one CLB.
22
CE (SR)
D(BY)
A[3:0]
SHIFTIN
CLK
22. A dynamic read access is performed through the
23.) Longer shift registers can be built with dynamic
Figure 22: Shift Register Configurations
4
WE
CK
A[4:1]
WS
SRLC16
WSG
SHIFT-REG
MC15
DI
D
SHIFTOUT
(optional)
D
Q
DS031_05_110600
Output
Registered
Output
www.xilinx.com
1-800-255-7778
1 Shift Chain
in CLB
SRLC16
SRLC16
SRLC16
SRLC16
Figure 23: Cascadable Shift Register
DI
DI
DI
DI
MC15
MC15
MC15
MC15
SHIFTIN
SHIFTIN
D
D
D
D
SLICE S3
SLICE S2
IN
SHIFTOUT
OUT
FF
FF
FF
FF
CASCADABLE OUT
SLICE S1
SLICE S0
DS122 (v1.1) January 7, 2004
DI
SRLC16
SRLC16
SRLC16
SRLC16
DI
DI
SHIFTIN
DI
MC15
MC15
MC15
MC15
Product Specification
D
D
D
D
SHIFTOUT
SHIFTOUT
DS031_06_110200
FF
FF
FF
FF
CLB
R

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