XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 65

• Manufacturer Part Number: XQ2V3000
• Description: QPro Virtex-II 1.5V Military QML Platform FPGAs
• Manufacturer: Xilinx

Table 53: Pipelined Multiplier Switching Characteristics
DS122 (v1.1) January 7, 2004
Product Specification
Data Inputs
Clock Enable
Reset
Clock to Output Pin
Clock to Pin 35
Clock to Pin 34
Clock to Pin 33
Clock to Pin 32
Clock to Pin 31
Clock to Pin 30
Clock to Pin 29
Clock to Pin 28
Clock to Pin 27
Clock to Pin 26
Clock to Pin 25
Clock to Pin 24
Clock to Pin 23
Clock to Pin 22
Clock to Pin 21
Clock to Pin 20
Clock to Pin 19
Clock to Pin 18
Clock to Pin 17
Clock to Pin 16
Clock to Pin 15
Clock to Pin 14
Clock to Pin 13
Clock to Pin 12
Clock to Pin 11
Clock to Pin 10
Clock to Pin 9
Clock to Pin 8
Clock to Pin 7
Clock to Pin 6
Clock to Pin 5
Clock to Pin 4
Clock to Pin 3
Clock to Pin 2
Clock to Pin 1
Clock to Pin 0
Setup and Hold Times Before/After Clock
R
Description
www.xilinx.com
1-800-255-7778
T
T
MULIDCK_RST
MULIDCK_CE
T
MULIDCK
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
MULTCK_P35
MULTCK_P34
MULTCK_P33
MULTCK_P32
MULTCK_P31
MULTCK_P30
MULTCK_P29
MULTCK_P28
MULTCK_P27
MULTCK_P26
MULTCK_P25
MULTCK_P24
MULTCK_P23
MULTCK_P22
MULTCK_P21
MULTCK_P20
MULTCK_P19
MULTCK_P18
MULTCK_P17
MULTCK_P16
MULTCK_P15
MULTCK_P14
MULTCK_P13
MULTCK_P12
MULTCK_P11
MULTCK_P10
MULTCK_P9
MULTCK_P8
MULTCK_P7
MULTCK_P6
MULTCK_P5
MULTCK_P4
MULTCK_P3
MULTCK_P2
MULTCK_P1
MULTCK_P0
Symbol
QPro Virtex-II 1.5V Military QML Platform FPGAs
/T
/T
/T
MULCKID
MULCKID_CE
MULCKID_RST
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3.89/0.00
0.86/0.00
0.86/0.00
Max
3.74
3.61
3.49
3.37
3.25
3.12
3.00
2.88
2.75
2.63
2.51
2.38
2.26
2.14
2.02
1.89
1.77
1.65
1.52
1.40
1.28
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
1.15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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