XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 51

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XQ2V3000

Manufacturer Part Number
XQ2V3000
Description
QPro Virtex-II 1.5V Military QML Platform FPGAs
Manufacturer
Xilinx
Datasheet

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LVPECL DC Specifications
These values are valid when driving a 100 Ω differential
load only, i.e., a 100 Ω resistor between the two receiver
pins. The V
levels and are compatible with devices tolerant of lower
Table 40: LVPECL DC Specifications
QPro Virtex-II Switching Characteristics
Switching characteristics in this document are specified on
a per-speed-grade basis and can be designated as
Advance, Preliminary, or Production. Each designation is
defined as follows:
Advance: These speed files are based on simulations only
and are typically available soon after device design specifi-
cations are frozen. Although speed grades with this desig-
nation are considered relatively stable and conservative,
some under-reporting might still occur.
Preliminary: These speed files are based on complete ES
(engineering sample) silicon characterization. Devices and
speed grades with this designation are intended to give a
better indication of the expected performance of production
silicon. The probability of under-reporting delays is greatly
reduced as compared to Advance data.
Production: These speed files are released once enough
production silicon of a particular device family member has
been characterized to provide full correlation between
speed files and devices over numerous production lots.
There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes. Typ-
Testing of Switching Characteristics
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values. For more
specific, more precise, and worst-case guaranteed data,
DS122 (v1.1) January 7, 2004
Product Specification
Differential Input Voltage
OH
R
levels are 200 mV below standard LVPECL
DC Parameter
V
V
V
V
CCO
V
OH
OL
IH
IL
0.96
1.49
0.86
Min
1.8
0.3
www.xilinx.com
1-800-255-7778
3.0
2.125
Max
2.11
1.27
2.72
common-mode ranges.
specifications of LVPECL. For more information on using
LVPECL
ically, the slowest speed grades transition to Production
before faster speed grades.
Since individual family members are produced at different
times, the migration from one category to another depends
completely on the status of the fabrication process for each
device.
Virtex-II device with a corresponding speed grade designa-
tion.
Table 41: QPro Virtex-II Device Speed Grade
Designations
All specifications are always representative of worst-case
supply voltage and junction temperature conditions.
use the values reported by the Xilinx static timing analyzer
and back-annotate to the simulation net list. Unless other-
wise noted, values apply to all QPro Virtex-II devices.
XQ2V1000
XQ2V3000
XQ2V6000
Device
QPro Virtex-II 1.5V Military QML Platform FPGAs
Table 41
1.92
1.06
1.49
0.86
,
Min
0.3
see the Virtex-II User Guide.
3.3
correlates the current status of each QPro
Advance
2.125
Max
2.28
1.43
2.72
Speed Grade Designations
Table 40
2.13
1.30
1.49
0.86
Min
0.3
Preliminary
summarizes the DC output
3.6
2.125
Max
2.41
1.57
2.72
Production
Units
–4
–4
–4
V
V
V
V
V
V
51

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