XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 32

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XQ2V3000

Manufacturer Part Number
XQ2V3000
Description
QPro Virtex-II 1.5V Military QML Platform FPGAs
Manufacturer
Xilinx
Datasheet

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QPro Virtex-II 1.5V Military QML Platform FPGAs
Association with Block SelectRAM Memory
The interconnect is designed to allow SelectRAM memory
and multiplier blocks to be used at the same time, but some
interconnect is shared between the SelectRAM and the
multiplier. Thus, SelectRAM memory can be used only up to
18 bits wide when the multiplier is used, because the multi-
plier shares inputs with the upper data bits of the
SelectRAM memory.
This sharing of the interconnect is optimized for an
18-bit-wide block SelectRAM resource feeding the multi-
plier. The use of SelectRAM memory and the multiplier with
an accumulator in LUTs allows for implementation of a digi-
tal signal processor (DSP) multiplier-accumulator (MAC)
function, which is commonly used in finite and infinite
impulse response (FIR and IIR) digital filters.
32
Figure 36: SelectRAM and Multiplier Blocks
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
18-Kbit block
SelectRAM
DS031_33_101000
www.xilinx.com
1-800-255-7778
Configuration
The multiplier block is an 18-bit by 18-bit signed multiplier
(2's complement). Both A and B are 18-bit-wide inputs, and
the output is 36 bits.
Locations/Organization
Multiplier organization is identical to the 18 Kbit SelectRAM
organization, because each multiplier is associated with an
18 Kbit block SelectRAM resource.
In addition to the built-in multiplier blocks, the CLB elements
have dedicated logic to implement efficient multipliers in
logic. (Refer to
Table 24: Multiplier Floor Plan
A[17:0]
B[17:0]
XQ2V1000
XQ2V3000
XQ2V6000
Device
Configurable Logic Blocks
Figure 37: Multiplier Block
Columns
Figure 37
4
6
6
MULT 18 x 18
Multiplier Block
shows a multiplier block.
Per Column
DS122 (v1.1) January 7, 2004
10
16
24
Product Specification
Multipliers
DS031_40_100400
(CLBs)).
Total
144
40
96
P[35:0]
R

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