XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 23

• Manufacturer Part Number: XQ2V3000
• Description: QPro Virtex-II 1.5V Military QML Platform FPGAs
• Manufacturer: Xilinx

Multiplexers
Virtex-II function generators and associated multiplexers
can implement the following:
•
•
•
•
Fast Lookahead Carry Logic
Dedicated carry logic provides fast arithmetic addition and
subtraction. The Virtex-II CLB has two separate carry
chains, as shown in the
The height of the carry chains is two bits per slice. The carry
chain in the Virtex-II device is running upward. The dedi-
cated carry path and carry multiplexer (MUXCY) can also
DS122 (v1.1) January 7, 2004
Product Specification
4:1 multiplexer in one slice
8:1 multiplexer in two slices
16:1 multiplexer in one CLB element (4 slices)
32:1 multiplexer in two CLB elements (8 slices)
R
G
G
F
F
Figure
25.
Figure 24: MUXF5 and MUXFX multiplexers
Slice S3
Slice S2
Slice S1
Slice S0
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G
G
F
F
Each Virtex-II slice has one MUXF5 multiplexer and one
MUXFX multiplexer. The MUXFX multiplexer implements
the MUXF6, MUXF7, or MUXF8, as shown in
Each CLB element has two MUXF6 multiplexers, one
MUXF7 multiplexer and one MUXF8 multiplexer. Examples
of multiplexers are shown in the Virtex-II User Guide
(
be used to cascade function generators for implementing
wide logic functions.
Arithmetic Logic
The arithmetic logic includes an XOR gate that allows a
2-bit full adder to be implemented within a slice. In addition,
a dedicated AND (MULT_AND) gate (shown in
improves the efficiency of multiplier implementation.
UG002
CLB
QPro Virtex-II 1.5V Military QML Platform FPGAs
). Any LUT can implement a 2:1 multiplexer.
MUXF8 combines
the two MUXF7 outputs
(Two CLBs)
MUXF6 combines the two MUXF5
outputs from slices S2 and S3
MUXF7 combines the two MUXF6
outputs from slices S0 and S2
MUXF6 combines the two MUXF5
outputs from slices S0 and S1
DS031_08_100201
Figure
Figure
17)
24.
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