PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 170
![MODULE PROC PIC18F4685](/photos/8/96/89696/pcm18xt0_sml.jpg)
PCM18XT0
Manufacturer Part Number
PCM18XT0
Description
MODULE PROC PIC18F4685
Manufacturer
Microchip Technology
Datasheet
1.PCM18XT0.pdf
(484 pages)
Specifications of PCM18XT0
Accessory Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F4685
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
- Current page: 170 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
TABLE 15-3:
DS39761C-page 170
INTCON
RCON
IPR1
PIR1
PIE1
IPR2
PIR2
PIE2
TRISB
TRISC
TMR1L
TMR1H
T1CON
TMR3H
TMR3L
T3CON
CCPR1L
CCPR1H
CCP1CON
ECCPR1L
ECCPR1H
ECCP1CON
Legend:
Note 1:
Name
2:
(1)
(1)
— = unimplemented, read as ‘0’. Shaded cells are not used by Capture and Compare, Timer1 or Timer3.
These bits or registers are available on PIC18F4682/4685 devices only.
The SBOREN bit is only available when CONFIG2L<1:0> =
(1)
PORTB Data Direction Register
PORTC Data Direction Register
Timer1 Register Low Byte
Timer1 Register High Byte
Timer3 Register High Byte
Timer3 Register Low Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Enhanced Capture/Compare/PWM Register 1 Low Byte
Enhanced Capture/Compare/PWM Register 1 High Byte
EPWM1M1 EPWM1M0
GIE/GIEH
PSPIP
PSPIF
PSPIE
OSCFIP
OSCFIF
OSCFIE
RD16
RD16
IPEN
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Bit 7
—
(1)
(1)
(1)
T3ECCP1
SBOREN
PEIE/GIEL
CMIP
CMIF
CMIE
T1RUN
ADIP
ADIF
ADIE
Bit 6
—
(1)
(1)
(1)
(2)
(1)
T1CKPS1 T1CKPS0 T1OSCEN
T3CKPS1 T3CKPS0 T3CCP1
EDC1B1
TMR0IE
DC1B1
RCIP
RCIF
RCIE
Bit 5
—
—
—
—
EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0
DC1B0
INT0IE
Bit 4
TXIP
TXIF
TXIE
EEIP
EEIF
EEIE
RI
CCP1M3
SSPIP
SSPIF
SSPIE
BCLIP
BCLIF
BCLIE
RBIE
Bit 3
TO
01
(1)
; otherwise, it is disabled and reads as ‘
T1SYNC
T3SYNC
CCP1M2
TMR0IF
CCP1IP
CCP1IF
CCP1IE
HLVDIP
HLVDIE
HLVDIF
Bit 2
PD
TMR1CS
TMR3CS
CCP1M1
TMR2IP
TMR2IF
TMR2IE
TMR3IP
TMR3IF
TMR3IE
INT0IF
© 2009 Microchip Technology Inc.
Bit 1
POR
ECCP1IP
ECCP1IF
ECCP1IE
TMR1ON
TMR3ON
CCP1M0
TMR1IP
TMR1IE
TMR1IF
RBIF
Bit 0
BOR
(1)
(1)
(1)
0
on page
’.
Values
Reset
51
52
54
54
54
54
54
53
54
54
52
52
52
53
53
53
53
53
53
53
53
53
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