PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 273

MODULE PROC PIC18F4685

PCM18XT0

Manufacturer Part Number
PCM18XT0
Description
MODULE PROC PIC18F4685
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XT0

Accessory Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F4685
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
22.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 22-1:
© 2009 Microchip Technology Inc.
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Note 1:
Name
Operation During Sleep
These bits are available in PIC18F4682/4685 devices and reserved in PIC18F2682/2685 devices.
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIE
OSCFIP
OSCFIF
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
CMIF
CMIE
CMIP
Bit 6
(1)
(1)
(1)
IRVST
Bit 5
PIC18F2682/2685/4682/4685
HLVDEN
INT0IE
EEIF
EEIE
EEIP
Bit 4
HLVDL3
BCLIF
BCLIE
BCLIP
22.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIE
HLVDIP
HLVDIF
Bit 2
HLVDL1
TMR3IF ECCP1IF
TMR3IE ECCP1IE
TMR3IP ECCP1IP
INT0IF
Bit 1
HLVDL0
RBIF
Bit 0
DS39761C-page 273
(1)
(1)
(1)
on Page
Values
Reset
52
51
54
54
53

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