PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 290

• Manufacturer Part Number: PCM18XT0
• Description: MODULE PROC PIC18F4685
• Manufacturer: Microchip Technology

Specifications of PCM18XT0

• Accessory Type: Processor Module
• Product: Microcontroller Modules
• Core Processor: PIC18F4685
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICE2000
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

PIC18F2682/2685/4682/4685
23.2.3
This section shows the dedicated CAN Receive Buffer
registers with their associated control registers.
REGISTER 23-13: RXB0CON: RECEIVE BUFFER 0 CONTROL REGISTER
DS39761C-page 290
Mode 0
Mode 1,2
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
Note 1:
2:
This bit is set by the CAN module upon receiving a message and must be cleared by software after the
buffer is read. As long as RXFUL is set, no new message will be loaded and buffer will be considered full.
After clearing the RXFUL flag, the PIR3 bit, RXB0IF, can be cleared. If RXB0IF is cleared, but RXFUL is
not cleared, then RXB0IF is set again.
This bit allows same filter jump table for both RXB0CON and RXB1CON.
DEDICATED CAN RECEIVE
BUFFER REGISTERS
bit 7
RXFUL: Receive Full Status bit
1 = Receive buffer contains a received message
0 = Receive buffer is open to receive a new message
Mode 0:
RXM1: Receive Buffer Mode bit 1 (combines with RXM0 to form RXM<1:0> bits, see bit 5)
11 = Receive all messages (including those with errors); filter criteria is ignored
10 = Receive only valid messages with extended identifier; EXIDEN in RXFnSIDL must be ‘1’
01 = Receive only valid messages with standard identifier; EXIDEN in RXFnSIDL must be ‘0’
00 = Receive all valid messages as per EXIDEN bit in RXFnSIDL register
Mode 1, 2:
RXM1: Receive Buffer Mode bit 1
1 = Receive all messages (including those with errors); acceptance filters are ignored
0 = Receive all valid messages as per acceptance filters
Mode 0:
RXM0: Receive Buffer Mode bit 0 (combines with RXM1 to form RXM<1:0> bits, see bit 6)
Mode 1, 2:
RTRRO: Remote Transmission Request bit for Received Message (read-only)
1 = A remote transmission request is received
0 = A remote transmission request is not received
Mode 0:
Unimplemented: Read as ‘0’
Mode 1, 2:
FILHIT4: Filter Hit bit 4
This bit combines with other bits to form filter acceptance bits <4:0>.
Mode 0:
RXRTRRO: Remote Transmission Request bit for Received Message (read-only)
1 = A remote transmission request is received
0 = A remote transmission request is not received
Mode 1, 2:
FILHIT3: Filter Hit bit 3
This bit combines with other bits to form filter acceptance bits <4:0>.
RXFUL
RXFUL
R/C-0
R/C-0
(1)
(1)
R/W-0
R/W-0
RXM1
RXM1
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
RTRRO
R/W-0
RXM0
(1)
R-0
FILHIT4
U-0
R-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXRTRRO RXB0DBEN
FILHIT3
R-0
R-0
FILHIT2
R/W-0
R-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
JTOFF
FILHIT1
R-0
R-0
(2)
FILHIT0
FILHIT0
R-0
R-0
bit 0