PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 350
![MODULE PROC PIC18F4685](/photos/8/96/89696/pcm18xt0_sml.jpg)
PCM18XT0
Manufacturer Part Number
PCM18XT0
Description
MODULE PROC PIC18F4685
Manufacturer
Microchip Technology
Datasheet
1.PCM18XT0.pdf
(484 pages)
Specifications of PCM18XT0
Accessory Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F4685
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
- Current page: 350 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
REGISTER 24-6:
REGISTER 24-7:
DS39761C-page 350
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-0
R/C-1
CPD
U-0
—
Unimplemented in PIC18F2682/4682 devices; maintain this bit set.
Unimplemented: Read as ‘0’
CP5: Code Protection bit
1 = Block 5 (014000-017FFFh) not code-protected
0 = Block 5 (014000-017FFFh) code-protected
CP4: Code Protection bit
1 = Block 4 (010000-013FFFh) not code-protected
0 = Block 4 (010000-013FFFh) code-protected
CP3: Code Protection bit
1 = Block 3 (00C000-00FFFFh) not code-protected
0 = Block 3 (00C000-00FFFFh) code-protected
CP2: Code Protection bit
1 = Block 2 (008000-00BFFFh) not code-protected
0 = Block 2 (008000-00BFFFh) code-protected
CP1: Code Protection bit
1 = Block 1 (004000-007FFFh) not code-protected
0 = Block 1 (004000-007FFFh) code-protected
CP0: Code Protection bit
1 = Block 0 (000800-003FFFh) not code-protected
0 = Block 0 (000800-003FFFh) code-protected
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM not code-protected
0 = Data EEPROM code-protected
CPB: Boot Block Code Protection bit
1 = Boot Block (000000-0007FFh) not code-protected
0 = Boot Block (000000-0007FFh) code-protected
Unimplemented: Read as ‘0’
R/C-1
CPB
U-0
—
CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
C = Clearable bit
C = Clearable bit
CP5
R/C-1
U-0
—
(1)
(1)
R/C-1
CP4
U-0
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
R/C-1
CP3
U-0
—
R/C-1
CP2
U-0
—
© 2009 Microchip Technology Inc.
R/C-1
CP1
U-0
—
R/C-1
CP0
U-0
—
bit 0
bit 0
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