MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 540

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Index-4
I
I2CR, 8-7
I2DR, 8-9
I2SR, 8-8
IADR, 8-6
IFDR, 8-6
integer data formats in, 2-13
interrupt controller
IPR and IMR, 9-6
IRQPAR, 9-7
JTAG
MBAR, 2-12, 6-4
MODCTL, 14-9
module base address, 2-12
MPARK, 6-11
PADAT, 15-2
PADDR, 15-2
PAR, 6-10, 15-1
parallel port
PBR, 5-16
pin assignment, 6-10
PLL control, 7-3
PLLCR, 7-3
programming model, 1-15
RAM base address, 2-12
RAMBAR, 2-12
RAREG/RDREG, 5-30
2
C
asynchronous
general operation, 11-3
synchronous
address, 8-6
control, 8-7
data I/O, 8-9
frequency divider, 8-6
status, 8-8
autovector, 9-5
pending and mask, 9-6
port assignment, 9-7
boundary scan, 19-7
bypass, 19-10
descriptions, 19-4
IDCODE, 19-6
instruction shift, 19-5
data, 15-2
pin assignment, 15-1
address and control, 11-5
DACR, 11-5
DCR, 11-4
DMR, 11-7
mode signals, 11-4
DACR, 11-20
DCR, 11-19
DMR, 11-22
mode settings, 11-33
MCF5407 User’s Manual
INDEX
RSTI timing, 7-5
S
SDRAM
RCREG, 5-42
RDMREG, 5-44
reset status, 6-5
RSMP, 14-12
RSR, 6-5
RXLVL, 14-8
SDRAM mode initialization, 11-38
SIM
software watchdog interrupt, 6-9
SR, 2-11
status, 2-11
supervisor, 1-16, 1-16
SWIVR, 6-9
SWSR, 6-9
SYPCR, 6-8
system protection control, 6-8
TCR, 13-4
TDR, 5-18
TER, 13-5
timer module
TMR, 13-3
TSPC, 14-13
TXLVL, 14-10
UACR, 14-17
UART modules, 14-3–14-21
UCR, 14-13
UCSR, 14-12
UDU/UDL, 14-19
UIP, 14-20
UIPCR, 14-17
UISR, 14-18
UIVR, 14-20
user, 1-15
VB, 2-12
vector base, 2-12
WAREG/WDREG, 5-31
WCREG, 5-43
WDMREG, 5-45
XTDR, 5-19
block diagram and major components, 11-2
controller registers, B-3
DACR initialization, 11-35
DCR initialization, 11-35
definitions, 11-2
base address, 6-4
memory map, 6-3
capture, 13-4
event, 13-5
mode, 13-3
reference, 13-4