MC68040FE33A Freescale Semiconductor, MC68040FE33A Datasheet - Page 8
MC68040FE33A
Manufacturer Part Number
MC68040FE33A
Description
IC MICROPROCESSOR 32BIT 184-CQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68EC040FE33A.pdf
(442 pages)
Specifications of MC68040FE33A
Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Package
184CQFP
Processor Series
M680xx
Core
CPU32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68040FE33A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Paragraph
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.3
6.4
6.5
6.6
6.7
7.1
7.2
7.3
7.4
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.5
7.5.1
7.5.1.1
7.5.1.2
7.5.1.3
7.5.2
7.6
7.6.1
7.6.2
7.6.3
7.7
7.8
7.8.1
7.8.2
7.8.2.1
7.8.2.2
x
Number
Boundary Scan Register ....................................................................... 6-6
Restrictions ........................................................................................... 6-12
Disabling The IEEE Standard 1149.1A Operation ................................ 6-13
Motorola M68040 BSDL Description (Version 2.2) ............................... 6-15
MC68040, MC68LC040, MC68EC040
Bus Characteristics ............................................................................... 7-1
Data Transfer Mechanism..................................................................... 7-3
Misaligned Operands ............................................................................ 7-6
Processor Data Transfers ..................................................................... 7-9
Acknowledge Bus Cycles ...................................................................... 7-29
Breakpoint Interrupt Acknowledge Bus Cycle ....................................... 7-35
Bus Exception Control Cycles............................................................... 7-36
Bus Synchronization ............................................................................. 7-43
Bus Arbitration And Examples .............................................................. 7-44
JTAG Electrical Characteristics .......................................................... 6-21
HIGHZ ............................................................................................... 6-4
SAMPLE/PRELOAD.......................................................................... 6-4
DRVCTL.T ......................................................................................... 6-4
SHUTDOWN ..................................................................................... 6-5
PRIVATE ........................................................................................... 6-5
DRVCTL.S......................................................................................... 6-5
BYPASS ............................................................................................ 6-6
Byte, Word, and Long-Word Read Transfers .................................... 7-10
Line Read Transfer ............................................................................ 7-12
Byte, Word, and Long-Word Write Transfers .................................... 7-20
Line Write Transfers .......................................................................... 7-22
Read-Modify-Write Transfers (Locked Transfers) ............................. 7-26
Interrupt Acknowledge Bus Cycles .................................................... 7-29
Bus Errors ......................................................................................... 7-37
Retry Operation ................................................................................. 7-41
Double Bus Fault ............................................................................... 7-43
Bus Arbitration ................................................................................... 7-45
Bus Arbitration Examples .................................................................. 7-52
TABLE OF CONTENTS (Continued)
Interrupt Acknowledge BUS Cycle (Terminated Normally) ............ 7-31
Autovector Interrupt Acknowledge bus Cycle ................................ 7-33
Spurious Interrupt Acknowledge Bus Cycle................................... 7-34
Dual M68040 Fairness Arbitration ................................................. 7-52
Dual M68040 Prioritized Arbitration ............................................... 7-54
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
Bus Operation
Section 7
Title
MOTOROLA
Number
Page
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