PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 109

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PSB2115FV1.2D

Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115FV1.2D

Lead Free Status / Rohs Status
Supplier Unconfirmed
If frames longer than 128 bytes are received, the device will repeatedly prompt to read
out 64 byte data blocks via interrupt.
In the case of several shorter frames, up to 17 may be stored in the IPAC.
If the accessible half of the RFIFOB contains a frame i (or the last part of frame i), up to
16 short frames may be stored in the other half (i + 1, … , i + n) meanwhile, prior to frame
i being fetched from the RFIFOB.
This is illustrated in figure 47.
For a description of a transmit and receive sequence please refer to chapter 3.4.
Figure 47
Note: The number of 17 frames applies e.g. for the IPAC operating in the non-auto mode
Semiconductor Group
(address recognition), and short frames only containing the HDLC Address and
Control field are received. Since the address is not stored, the control field is
always stored first in the RFIFOB, and an additional status byte is always
appended at the end of each frame in the RFIFOB, these frames will occupy two
bytes.
Configuration of RFIFOB (Short Frames)
109
Functional Description
2115_1
PSB 2115
PSF 2115
11.97

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