PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 159

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PSB2115FV1.2D

Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115FV1.2D

Lead Free Status / Rohs Status
Supplier Unconfirmed
Semiconductor Group
Table 21 User Demand Registers
User Demand
RFS Interrupt Provided
Selective Interrupts Should be Masked
DMA Controlled Data Transfer
Receive Length Check Feature
Extended (modulo 128) Counting
D-Channel registers
Register
SPCR
MODED
ADF1
Bit
SPU
SDL
SPM
TLP
C2C1-0
C1C1-0
DIM2-0
MDS2-0
TMD
CSEL2-0
Effect
Pull DU low (to request clocking from
layer-1 device).
Switch Data Line
IOM-2 data port DU/DD direction
control
0 Terminal timing mode
1 Non-terminal timing mode
IOM-2 interface test loop
B/IC channel connect
IOM interface configuration for
D + C/I channel arbitration
Stop/Go bit monitoring for HDLC
transmission yes/no
HDLC message transfer mode 2
octet/(1 octet) address
Timer mode external/internal
IOM channel select (Time slot)
159
Operational Description
Register
CCR2
MASKB
XBCH
RLCR
RAH2
Application
TE
TE
LT
Auto mode only
non-TE
PSB 2115
PSF 2115
11.97

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