PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 23

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Pin No. Symbol Input (I)
IOM-2 Interface
53
54
51
52
50
61
60
Semiconductor Group
AUX6
AUX7
FSC
DCL
DU
DD
BCL/
SCLK
Output (O)
I/O
I/O
I/O
I/O(OD)
I/O (OD)
O
Function
Auxiliary Port 6/7
All Modes: INT0/1
This pin is programmable as general input/output. The
state of the pin can be read from (input) / written to
(output) a register.
Additionally, as input they can generate a maskable
interrupt to the host, which is either edge or level
triggered. An internal pull up resistor is connected to
these pins.
As outputs an LED can directly be connected to these
pins.
LT-T mode:
AUX7 can also be programmed to output the S/G bit
signal from the IOM-2 DD line (LT-T mode only).
Frame Sync
Synchronisation signal. The rising edge indicates the
beginning of the IOM frame (HIGH during channel 0 in
TE mode).
Data Clock
IOM clock signal of twice the IOM data rate. The first
rising edge is used to transmit data, the second falling
edge is used to sample data.
Data Upstream
IOM data signal in upstream direction.
Data Downstream
IOM data signal in downstream direction.
Bit Clock/S-clock
TE-Mode:
Bit clock output, identical to IOM data rate.
LT-T Mode:
1.536 MHz output synchronous to S-interface.
LT-S Mode:
Bit clock output derived from the DCL input clock
divided by 2.
23
PSB 2115
PSF 2115
Overview
11.97