PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 306

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PSB2115FV1.2D

Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115FV1.2D

Lead Free Status / Rohs Status
Supplier Unconfirmed
Address: 4h
C/I
TOD
MON-8 SM/CI Register
This multifeature register allows access to the C/I channel and controls the monitor time-
out.
Value after Reset: X0
Semiconductor Group
has been set previously. If the CIH bit was not programmed the content of
the CI bits will be ignored and the IPAC will access the IOM-2 C/I channel.
When reading the SM/CI register these bits will always return the current
C/I indication (independent of CIH bit).
Refer to section “Monitor Timeout” for details.
Allows the user to access the C/I channel if the CIH bit in the IOM-2 register
Time Out Disable. Allows the user to disable the monitor time-out function.
CI3
H
CI2
(X contains the C/I code)
CI1
CI0
306
TOD
0
0
0
PSB 2115
PSF 2115
Appendix
RD/WR
11.97

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