PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 99

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PSB 2115
PSF 2115
Functional Description
As a second option, the IPAC allows for indirect access of the registers (AMODE=1).
Only the LSB of the address line is used to select either the ADDRESS register or the
DATA register. The host writes the register address to the ADDRESS register (write only
register), before it reads/writes data from/to the corresponding register location through
the DATA register. Figure 37 shows both register addressing modes.
In indirect address mode (AMOD=1) all other address lines except A0 are not evaluated
by the IPAC. They may be tied to log. ’0’ or ’1’, however they must not be left open.
Figure 37
Indirect Register Address Mode
2.6.2
Register Set
The communication between the host and the IPAC is done via a set of directly or
indirectly accessible 8-bit registers. The host sets the operating modes, controls function
sequences and gets status information by writing or reading these registers (Command/
Status transfer).
Each of the two B-channels of the IPAC is controlled via an equal, but totally independent
register file (channel A and channel B). Additional registers are available for D-channel
control, the PCM and the Auxiliary interface.
Semiconductor Group
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11.97