AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 233

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AGXD533AAXF0CC

Manufacturer Part Number
AGXD533AAXF0CC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AGXD533AAXF0CC

Device Core
X86
Device Core Size
64b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
368
Package Type
BGD
Lead Free Status / Rohs Status
Not Compliant
Graphics Processor Register Descriptions
6.4.1.5
MSR Address
Type
Reset Value
This MSR contains the power management controls for the Graphics Processor. Since there is only one clock domain
within the Graphics Processor, most bits in this register are unused.This register allows the Graphics Processor to be
switched off by disabling the clocks to this block. If hardware clock gating is enabled (bits [1:0] = 01), the Graphics Proces-
sor turns off its clocks whenever there is no BLT Busy or Pending and no GLIU transactions destined for the Graphics Pro-
cessor. A register or MSR write causes the Graphics Processor to wakeup temporarily to service the request, then return to
power down. A write to the GP_BLT_MODE (GP Memory Offset 40h) or GP_VECTOR_MODE (GP Memory Offset 3Ch)
registers causes the Graphics Processor to wakeup for the duration of the requested operation.
6.4.1.6
MSR Address
Type
Reset Value
This register is reserved for internal use by AMD and should not be written to.
AMD Geode™ GX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:33
31:2
Bit
1:0
32
GLD Power Management MSR (GLD_MSR_PM)
GLD Diagnostic MSR (GLD_MSR_DIAG)
Name
RSVD
RSVD
RSVD
PMODE0
A0002004h
R/W
00000000_00000000h
A0002005h
R/W
00000000_00000000h
Description
Reserved. Write as read.
Reserved. Write as 0.
Reserved. Write as read.
Power Mode 0. Clock control mode.
00: Disable clock gating. Clocks are always on.
01: Enable active hardware clock gating. Clock goes off whenever this module’s circuits
10: Reserved.
11: Reserved.
are not busy.
GLD_MSR_PM Bit Descriptions
GLD_MSR_PM Register Map
RSVD
RSVD
9
8
31505E
7
6
5
4
3
2
1
233
0

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